一种宽动态范围跨阻放大器的设计

针对光电探测器的光电流信号弱、变化范围大的特点,设计了一种全新的检测光电流信号的跨阻放大器(TIA)电路结构,其检测电流信号范围为1.6 μ上A～1.6 mA,动态电流检测范围达到60 dB.通过在电路内部设计出两个增益可调、增益段不同的TIA,分别处理光电流的小电流段(1.6～50 μA)和大电流段(50 μA～1.6 mA),增益可调范围为56～96 dBΩ;通过外置输出电压饱和检测信号,选择所需工作的TIA及其增益段.该电路采用0.18 μm标准CMOS工艺的PDK进行电路设计、版图设计和仿真验证等.测试结果表明:在检测电流为1.6 μA时,输出电压为95 mV;检测电流为1.6mA时,输出电压为915 mV,与仿真结果相一致.电路瞬态特性良好,上升时间为5～10 ns,3.3V电压下功耗小于2 mW,各指标满足设计要求.     

一种用于LED驱动的恒流控制电路设计

提出一种用于LED驱动的恒流控制电路,通过对一个基准电流进行放大,得到LED的输出电流;通过改变基准电流的大小,可以按比例改变输出电流的大小,即实现LED驱动的模拟调光功能.该电路对基准电流进行2000倍的放大,基准电流可以在5～110 μA的范围内变化,能满足常规LED驱动芯片模拟调光功能的要求.仿真结果表明,该电路产生的LED输出电流误差小于0.03％,对温度敏感性小,能在较大温度范围内保持正常工作,且设计了相关的修调电路,使电路的匹配性更好、精度更高.     

一种高效率Buck变换器的设计

设计了一种基于0.35μm BCD工艺的高效率Buck变换器电路.电路输入电压为10 V～24 V,输出电压为5 V～12 V,最大负载电流为100 mA.采用迟滞控制模式来简化电路结构,降低静态功耗,并通过引入睡眠模式来降低Buck变换器的整体功耗,在Active模式下,静态电流约为110 μA,在Sleep模式下,...     

一种新颖的快速启动零温度系数电流基准

基于三极管BE结电压的负温度特性原理,提出了一种零温度系数电流基准电路.该电路具有结构简单、无需带隙基准单元、静态功耗低、启动快速、对电源电压不敏感等优点,实用性高.在0.5 μm标准CMOS工艺下,Hspice模拟结果显示,在25℃、1.8～5.5 V范围内,基准电流变化0.019μA;在1.8 V、-40℃～125℃范围内,基准电流变化0.09μA.该新方案可用于无需电压基准、低功耗、需要快速启动的混合信号系统设计.     

用于HBWLED驱动电路的宽共模电压误差放大器

针对高亮度白光(HBW)LED驱动芯片等在高输入共模电压条件下工作的应用需要,提出一种基于高端电流检测的新型误差放大器,其特点是共模电压范围宽,具有良好的高端电流检测特性.特殊的电路结构设计使该放大器具有失调电压可调的功能,可用于实现对LED调光电流的控制.给出了整个电路的设计,并在1.5 μm BiCMOS工艺下实现.仿真结果显示,误差放大器输入共模范围达350 V,共模抑制比为80 dB,输入失调电压可调范围为8～92 mV.测试结果表明,芯片的主要性能与设计结果相符.     

一种新颖的LDO线性稳压器

设计了一种新颖的LDO线性稳压器.该LDO工作于负电源,具有微功耗、自身固定-5 V输出、外接反馈电阻可实现可调输出等特点.基于0.6 μm SOI CMOS工艺进行流片.测试结果表明,该电路输入电源电压VIN为-2～-18 V,可调输出电压为-1.3 V～VIN+0.5 V@Iour=15mA.该LDO功耗低,室温下空载静态电流约4.8μA,并且几乎不随VIN变化.内部带隙电压基准采用β二阶补偿,结构简单,温度系数为1.28×10-5/℃.线性调整率为0.015％,负载调整率为0.85 Ω.     

一款电流型控制的DC／DC降压转换器

本文提出一种新型电感电流检测电路,该检测电路不需要一个放大器作为电压镜像,从而使用的器件更少,功耗更低。该电感电流检测电路应用于DC／DC降压转换器,采用CSM 0．18μm CMOS工艺进行设计和仿真,仿真结果显示该电感电流检测电路的精度可达到96％,输出电压的纹波仅为1mV。     

CMOS对数放大器的接收信号强度指示器设计

介绍了一种应用于光接收机系统、速率可达155 Mbit/s的CMOS限幅/对数放大器的接收信号强度指示器(RSSI).电路采用0.6 μm双多晶硅N阱CMOS工艺设计并实现.在低功率、低电压条件下,RSSI实现了分段线性对数逻辑功能.在5 V电源电压下,RSSI可以检测动态输入范围大于60 dB的接收信号的强度,并且RSSI误差保持在3dB之内,满足了光纤通信系统的要求.电路典型功耗6 mW.     

2.4GHz频率综合器中低杂散锁相环的设计

在带电荷泵的锁相环频率综合器中,设计低杂散锁相环的关键是减少鉴频鉴相器和电荷泵的非理想特性以及提高压控振荡器的性能.采用TSMC 0.18 μm CMOS工艺,设计了一种改进型锁相环电路.仿真结果显示,在1.8V基准电压供电时,电荷泵电流在0.3～1.6V电压范围内匹配度小于1μA,电流失配率小于0.2％,压控振荡器在中心频率2.4 GHz频偏1 MHz时的相位噪声为-124.3 dBc/Hz@1 MHz,环路参考杂散降为-60 dBm.     

高效率高精度LED控制驱动电路设计

分析了LED特性及其驱动要求,设计基于PT4115的LED控制驱动器,并以此为例研究和实验分析了目前主流LED驱动技术存在的问题及有待改进的方面,给出了降低电路功耗和提高电流控制精度的改进方案:通过对反馈信号差分放大使等效反馈电阻减小来达到降低电路功耗的目的;在反馈控制电路中引入双积分电路使电路输出恒流性能好,从而提高了电流控制精度。经实验验证说明设计方案可行有效,为LED的控制驱动提出了新的思路和方法。     

Current Differencing Cascaded Transconductance Amplifier (CDCTA) and Its Applications on Current-Mode nth-Order Filters

In this paper, a new active device, current differencing cascaded transconductance amplifier (CDCTA), has been presented. The proposed CDCTA simplifies the design of the current-mode filter circuit considerably, especially the design of high-order filter. Moreover, a current-mode nth-order filter based on the CDCTA is proposed in the paper. The proposed circuit, which adopts only an active component and n grounded capacitors, contains minimal active component and passive one. It enjoys the simple configuration and is suitable for integrated circuit (IC) fabrication. PSpice simulations for current-mode third-order filter based on this structure have also been conducted, and the results are in good agreement with the theoretical analysis. The influences of the CDCTA non-idealities are also discussed.     

适用于4G无线LTE通信系统的紧凑型谐波抑制功率放大器

为了满足4G无线移动通信LTE系统对功率放大器的性能需求,提出了一种新型采用低通滤波器（Low-Pass Filter,LPF）集成的n次谐波抑制紧凑型功率放大器。该功率放大器使用低通滤波器作为输出阻抗变换网络,以便得到所需阻抗产生最大功率,从而省略了传统的输出匹配网络。所以,相较于传统的功率放大器,提出的功率放大器尺寸减少了25%。此外,由于在输出端使用了低通滤波器,大幅抑制了（2次-5次）谐波,衰减程度较大。提出的功率放大器的设计频率为2.6 GHz,适用于LTE系统。仿真结果与实测结果比较吻合,证明了提出的设计有效性。     

CMOS current-controlled current differencing transconductance amplifier and applications to analog signal processing

This article presents design of a basic current-mode building block for analog signal processing, named as current-controlled current differencing transconductance amplifier (CCCDTA). Its parasitic resistances at two current input ports can be controlled by an input bias current. Owing to working in current-mode of all terminals, it is very suitable to use in a current-mode signal processing, which is continually more popular than a voltage one. The proposed element is realized in a CMOS technology and is examined the performance through PSPICE simulations. They display usability of the new active element, where the maximum bandwidth is 311 MHz. The CMOS CCCDTA performs low power consumption and tuning over a wide current range. In addition, some examples as a current-mode universal biquad filter, floating inductance simulator and quadrature oscillator are included. They occupy only single CCCDTA.     

新型LED路灯电源驱动器研究

针对现有LED路灯照明存在故障多,使用寿命短的问题,设计了一种新型LED电源驱动器。该驱动器使用MCU单片机数字控制,实现电源输出电流、电压智能性与可控性,同时采用扼流圈、磁放大器原件等器件进行电源纹波滤波,完全去掉电解电容器,达到提高产品的可靠性,大幅度延长LED路灯使用寿命的目的。     

一种基于OTA和MOCCII实现的n阶多功能滤波器

提出了一种基于运算跨导放大器和第二代电流传输器结合的电流模式多功能滤波器方法。该方法是将高阶通用电流模式滤波器的传递函数分解为n个无损积分器级联的形式,适当选定输入电流信号可同时实现低通、高通、带通、带阻等滤波功能,而电路内部结构及器件数目无需改变。与同类电路相比,其设计简便、结构简单、无源元件全部接地,且易于集成。同时文中还给出了滤波器的设计实例,Pspice仿真结果与理论分析相吻合,也验证了该方法的可行性。该滤波器可用于通信、电子测量与仪器仪表的信号处理中。     

一种应用于DSP嵌入式存储器的灵敏放大器设计

提出了一种新型灵敏放大器,电路由单位增益电流传输器、电荷转移放大器及锁存器三部分组成。基于0.18μm标准CMOS单元库的仿真结果表明,与现有几种灵敏放大器相比,新型灵敏放大器具有更低的延时和功耗,在1.8 V工作电压、500 MHz工作频率、80μA输入差动电流以及DSP嵌入式SRAM6T存储单元测试结构下,每个读周期的延迟为728 ps,功耗为10.5fJ。与电压灵敏放大器相比,延迟减少约41%,功耗降低约50%;与常规电荷转移灵敏放大器相比,延迟减少约22%,功耗降低约37%;与WTA电流灵敏放大器相比,延迟减少11%,功耗降低31.8%。     

高速低功耗电流型灵敏放大器的设计

提出了一款适合在低电压、大容量SRAM中应用的高速低功耗电流型灵敏放大器。该电路在交叉耦合反相器之间添加了一对隔离管,有效消除了大量位线寄生电容所带来的负面影响,从而极大提高了灵敏放大器的速度。同时,通过对时序控制电路的优化,有效降低了放大器的功耗。采用SMIC0．13μm数字工艺在HSpice下进行仿真,结果表明：在室温,1．2V工作电压下,灵敏放大器的放大延迟仅为0．344ns,功耗为102μw。相比文献中提出的电流型灵敏放大器,速度分别提高了9．47％和31．2％,功耗则降低了64．8％与63％。     

Low power dual-port CMOS SRAM macro design

A novel low power dual-port CMOS SRAM structure is described. The inherent low power advantage is obtained by using current-mode rather than voltage-mode signal transmission. The design of this new dual-port memory cell and current-mode sense amplifier is based on 0.5 μm, 5 V CMOS logic process technology. HSPICE simulations show that the circuits can operate at high speed even if the supply voltage is reduced to 2 V. The dual-port memory cell is most suitable for the design of FIFO buffers     

Remodeling light emitting diode in low current region

A general expression is proposed for the current-voltage (I-V) characteristics of junction diode by which it is possible to determine forward voltage across diode at actual current and temperature. Expressions fur the band gap and temperature coefficient of junction voltage based on the experimental measurements are also presented. The expressions include only experimentally obtained and derived values. These expressions have been used to check the performance of logarithmic amplifier using light emitting diode (LED) as a feedback clement, at different temperatures. Further, it has been shown that it is possible to predict the behavior of a logarithmic amplifier without temperature compensation techniques within 5% accuracy for the current range 10^-12-10^-5 A and for the temperature range -5°-60°C. The alternative could be the use of temperature compensation circuitry which may make electrometer circuit more complex. The proposed scheme is useful in applications where it is difficult to incorporate temperature compensation technique and space and power are at premium     

Current-Mode First-Order Allpass Filter Employing Single Current Operational Amplifier

A current-mode first-order allpass filter configuration is proposed. The presented circuit uses a single current operational amplifier (COA), a resistor and a capacitor, which are of minimum number. High output impedance of the proposed filter enables the circuit to be cascaded without additional buffers. The proposed circuit is insensitive to parasitic input capacitances and input resistances due to internally grounded input terminals of COA. It does not impose any component matching constraint in analog signal processing circuits. Non-ideal effects of COA to the first-order allpass network are also investigated. To demonstrate the performance of the proposed filter a new current-mode quadrature oscillator is given as an application example. The theoretical results are verified with PSPICE simulations using a new realization of fully differential CMOS COA.