A High Efficiency Dual-Mode Buck Converter IC For Portable Applications

This paper presents the design of a novel wide output current range dual-mode dc to dc step-down (Buck) switching regulator/converter. The converter can adaptively switch between pulsewidth modulation (PWM) and pulse-frequency modulation (PFM) both with very high conversion efficiency. Under light load condition the converter enters PFM mode. The function of closing internal idle circuits is implemented to save unnecessary switching losses. The converter can be switched to PWM mode when the load current is greater than 100 mA. Soft start operation is designed to eliminate the excess large current at the start up of the regulator. The chip has been fabricated with a TSMC 2P4M 0.35 mum polycide CMOS process. The range of the operation voltage is from 2.7 to 5 V, which is suitable for single-cell lithium-ion battery supply applications. The maximum conversion efficiency is 95% at 50 mA load current. Above 85 % conversion efficiency can be reached for load current from 3 to 460 mA.     

基于峰值电流模控制的浮动栅驱动电路

设计了一种基于峰值电流模控制的浮动栅驱动电路,包括浮动栅宽电路和浮动栅压电路。电感电流的峰值由误差放大器的输出电压决定,不需要额外的负载电流信息进行浮动栅控制。可以根据负载电流的大小自适应调节功率管的栅宽和栅压,使效率得到优化。仿真结果表明,在1 MHz开关频率、5 V输入、0.8 V输出的双N管Buck变换器中,采用浮动栅驱动控制的Buck变换器与普通的Buck变换器相比,在轻载情况下最多可达到10%的效率提升。     

A fully integrated switched-capacitor DC–DC converter with hybrid output regulation

In this paper, we propose a fully integrated switched-capacitor (SC) DC–DC converter with hybrid output regulation that allows a predictable switching noise spectrum. The proposed hybrid output regulation method is based on the digital capacitance modulation for fine regulation and the automatic frequency scaling for coarse regulation. The automatic frequency scaler and on-chip current sensor are implemented to adjust the switching frequency at one of the frequencies generated by a binary frequency divider with change in load current. Thus, the switching noise spectrum of the proposed SC DC–DC converter can be predicted over the entire load range. In addition, the bottom-plate losses due to the parasitic capacitances of the flying capacitors and the gate-drive losses due to the gate capacitances of switches are reduced at light load condition since the switching frequency is automatically adjusted. The proposed SC DC–DC converter was implemented in a 0.13 µm CMOS process with 1.5 V devices, and its measurement results show that the peak efficiency and the efficiency at light load condition are 69.2% and higher than 45%, respectively, while maintaining a predictable switching noise spectrum.     

一种具有750mA输出电流,双模式PWM/PFM控制的高效率直流-直流降压转换器

提出了一种输出电流可达750mA,脉宽调制（PWM）和变频调制（PFM）双模式控制的,高效率、高稳定性直流-直流降压转换器.该转换器在负载电流大于80mA时,采用开关频率为1MHz的PWM工作模式;在负载电流小于80mA时,采用开关频率减小和静态电流降低的PFM工作模式,实现了在整个负载电流变化范围（0.02~750mA）内,转换器均保持高效率.而且采用一种快速响应的电压模式控制结构,达到了优异的线性和负载调整特性.芯片采用CSMC公司0.5μm CMOS 2P3M混合信号工艺物理实现.测试结果表明,该电路可根据负载的变化在PWM和PFM模式下自动切换.最大转换效率达96.5%;当负载电流为0.02mA时,转换效率大于55%.该芯片特别适合电池供电的移动系统使用.     

一种基于自适应峰值电流检测的模式切换电路北大核心

在降压转换器中，为了在不同的负载情况下获得高效率，常采用的方法是在重载时使用脉冲宽度调制(PWM),在轻载时使用脉冲频率调制(PFM),因此需要模式切换信号去控制整个降压转换器的工作状态，同时模式切换信号也可以用于自适应改变功率级电路中的功率管栅宽，减小功率管的栅极电容，提高整体电路的效率。文章设计了一个自适应峰值电流模式切换电路，用于产生模式切换信号，其原理是监控峰值电流的变化，产生峰值电压，将峰值电压与参考电压进行比较，得到模式切换信号，以决定降压转换器是采用PFM模式还是PWM模式。仿真结果表明，在负载电流0.5～500 mA范围内，该电路可以在两种调制模式之间平稳切换，其峰值效率可提升到94%以上。     

DCM,FSM,dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range

This paper presents a width controller,a dead time controller,a discontinuous current mode(DCM) controller and a frequency skipping modulation(FSM) controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed D...     

A voltage mode buck DC–DC converter with automatic PWM/PSM mode switching by detecting the transient inductor current

This paper presents a voltage mode buck DC–DC converter that integrates pulse-width modulation (PWM) and pulse-skipping modulation (PSM) to achieve high efficiency under heavy and light load conditions, respectively. Automatic mode-switching is implemented simply by detecting the voltage drop of high-side power switch when it is on, which indicates the transient current flowing through the inductor. Unlike other methods based on average current sensing, the proposed auto-mode switching scheme is implemented based on voltage comparison and simple control logic circuit. In order to avoid unstable mode switching near the load condition boundary, the mode switching threshold voltage is set differently in PWM and PSM mode. Besides, a 16-cycle counter is also used to ensure correct detection of the change in the load condition and fast response of the converter. In addition, a dual-path error amplifier with clamp circuit is also adopted to realize loop compensation and ensure 100 % duty cycle operation. Fabricated in a 0.18-μm standard CMOS technology, the DC–DC converter is able to operate under supply voltage from 2.8 to 5.5 V with 3-MHz clock frequency. Measurement results show that the converter achieves a peak efficiency of 93 %, and an output voltage ripple of less than 40 mV, while the chip area is 1.02 mm².     

A dual-mode fast-transient average-current-mode buck converter without slope-compensation

A dual-mode fast-transient average-current-mode buck converter without slope-compensation is proposed in this paper. The benefits of the average-current-mode are fast-transient response, simple compensation design, and no requirement for slope-compensation, furthermore, that minimizes some power management problems, such as EMI, size, design complexity, and cost. Average-current-mode control employs two loop control methods, an inner loop for current and an outer one for voltage. The proposed buck converter using the current-sensing and average-current-mode control techniques can be stable even if the duty cycle is greater than 50%. Also, adaptively switch between pulse-width modulation (PWM) and pulse-frequency modulation (PFM) is operated with high conversion efficiency. Under light load condition, the proposed buck converter enters PFM mode to decrease the output ripple. Even more, switching PWM mode realizes a smooth transition under heavy load condition. Therefore, PFM is used to improve the efficiency at light load. Dual-mode buck converter has high conversion efficiency over a wide load conditions. The proposed buck converter has been fabricated with TSMC 0.35 μm CMOS 2P4M processes, the total chip area is 1.45×1.11 mm². Maximum output current is 450 mA at the output voltage 1.8 V. When the supply voltage is 3.6 V, the output voltage can be 0.8-2.8 V. Maximum transient response is less than 10 μs. Finally, the theoretical analysis is verified to be correct by simulations and experiments.     

An automatic load-adaptive switching frequency selection technique for improving the light-load efficiency of a buck converter

A load-adaptive automatic switching frequency selection scheme is proposed to improve the power efficiency of a switching buck converter at light load condition. The buck converter operates in the continuous-conduction mode for heavy loading and the switching frequency is fixed at its maximum value. For light loading, the buck converter operates in the discontinuous-conduction mode and its switching frequency is automatically selected among a pre-defined set of frequencies according to the amount of the load current. The load current can be sensed indirectly by monitoring the on-time of power transistor because it is a function of the load current. With the proposed load-adaptive automatic switching frequency selection circuit, the power efficiency of a buck converter implemented in a 0.35-μm 2P4M BCDMOS technology is improved by 24.0-% when the load current load is 10-mA.     

Adaptive off-time control for variable-frequency, soft-switchedflyback converter at light loads

The soft switching of a flyback converter can be achieved by operating the circuit in the critical conduction mode. However, the critical-mode operation at light loads cannot be maintained due to a very high switching frequency and the loss of the output voltage regulation. A control which regulates the output down to the zero load and maintains soft switching at light loads is proposed. The proposed control scheme was implemented in the 380 V/19 V, 65 W flyback DC/DC converter     

A high-performance ZVS full-bridge DC-DC 0-50-V/0-10-A power supplywith phase-shift control

This paper presents a high-performance DC-DC switching mode power supply designed to deliver a regulated 0-50 V/0-10 A output. The proposed power supply is based on a modified version of the zero-voltage switching (ZVS) full-bridge (FB) phase-shift DC-DC converter, which incorporates commutation auxiliary inductors to provide ZVS for the entire load range as well as a commutation aid circuit to clamp the output diode voltage. The control strategy is based on two control loops operating in cascade mode. The inner loop maintains a regulated output current, whereas the external voltage loop regulates the output voltage, independently of load and input-voltage changes. In order to obtain a high-reliability converter, the control circuit has been implemented using just two integrated circuits (ICs). The phase-shift regulator UC3875 IC generates the gate drive signal to the MOSFET's. The control loop regulators are implemented using the TL074 IC. A theoretical analysis was conducted, and experimental results were obtained for a 0-50 V/0-10 A power supply operating at 100 kHz     

A novel high efficiency low ripple switched-capacitor DC/DC converter

This paper presents a new method to improve light load efficiency and minimize output ripple of switched-capacitor (SC) DC/DC converters. In order to improve light load efficiency, this paper proposes adaptive frequency modulation to scale down gate-drive losses as load current reduces. Adaptive duty cycle modulation is proposed to minimize output ripple as the converter works under different gain hopping mode. Furthermore, this work optimized switching frequency, the dead time of 2-phase non-overlapping clocks and switching transistor size for efficiency enhancement. A new compensation circuit is also proposed to make system stable. A transistor level implementation of the proposed SC converter in Chartered 0.35 μm CMOS process is provided. Measurement results shows: maximum ripple voltage is <8 mV and efficiency is up to 87%.     

A Dual-Mode Step-up DC/DC Converter IC with Current-Limiting and EMI Reduction Techniques

This paper presents a novel dual-mode step-up （boost） DC/DC converter. Pulse-frequency modulation （PFM） is used to improve the efficiency at light load. This converter can operate between pulse-width modulation （PWM） and pulse-frequency modulation. The converter will operate in PFM mode at light load and in PWM mode at heavy load. The maximum conversion efficiency of this converter is 96%. The conversion efficiency is greatly improved when load current is below 100 mA. Additionally, a soft-start circuit and a variable-sawtooth frequency circuit are proposed in this paper. The former is used to avoid the large switching current at the start up of the converter and the latter is utilized to reduce the EMI of the converter.     

A pseudo-CCM/DCM SIMO switching converter with freewheel switching

This paper presents a single-inductor multiple-output (SIMO) converter operating in pseudo-continuous conduction mode (PCCM) and/or discontinuous conduction mode (DCM). With the proposed freewheel switching control, this converter can handle large load currents with a much smaller current ripple, while retaining low cross regulation. It can also work in DCM for high efficiency at light loads. A prototype of a single-inductor dual-output (SIDO) boost converter was fabricated with a standard 0.5-/spl mu/m CMOS n-well process. The two outputs are regulated at 2.5 and 3.0 V, respectively. At an oscillator frequency of 1 MHz, the efficiency reaches 89.4% at a total output power of 320 mW. Compared with prior designs, both current and voltage ripples are reduced. This design can be extended to have multiple outputs and for different types of dc-dc conversions, or be applied to single-output converters for fast transient response.     

一种宽输入电压范围软开关电流型DC/DC转换器

针对太阳能光伏及燃料电池等领域电源需要较宽输入电压范围的需求,提出一种通用的具有较宽输入电压范围的软开关电流型DC/DC转换器。该转换器采用了固定频率混合调制设计,可以在所有工作条件下实现半导体器件的软开关工作,并采用电流馈电技术以便适用于低电压高电流的电源。相较于传统转换器,该转换器更为通用,能够实现零电压开关和零电流开关,并且能够在输入电压和负载变化出现较大变化时控制输出电压。实验结果显示,在20-60V输入电压范围内且负载出现变化时,该转换器均表现出良好的性能。     

A PWM DC-DC converter with optimum segmented output stage and current detector

High efficiency is very important for DC-DC power supplies in portable applications. A PWM DC-DC converter with optimum segmented output stage is proposed in this paper whose efficiency at light load is improved. The segmented output stage is optimally divided into 5 small segments plus 4 big segments. The segmented number of the output stage can be adaptively regulated according to the load current. Moreover, two current detector circuits are simultaneously adopted to form a mixed load current sensor in the converter to improve the detecting accuracy. A segmented current SenseFET (SCS) is used to sense the load current in continuous current mode, and a time digital converter with digital judgement (TDC-D) is designed to detect the load current in discontinuous current mode. The structure of the proposed PWM converter with optimum segmented output stage and mixed load current detector circuits is described in this paper, which has been implemented in a 0.13 μm CMOS process. Simulation and testing results show that the output stages of the PWM converter can self transit from one segment stage to another segment stage according to the load condition. And the maximum efficiency improvement of the proposed converter can reach 15%.     

一种车用恒流/恒压模式的四开关Buck-Boost变换器控制策略研究

对一种车用恒流/恒压模式的四开关Buck-Boost变换器的控制策略进行了研究。在输入输出电压接近时引入Buck-Boost模式,从而在不同输入输出电压大小关系下,通过检测功率管占空比大小,实现Buck模式、Boost模式和Buck-Boost模式之间的平滑切换,提高了系统的稳定性。通过设计最大值选择电路,使变换器在充电应用中自动从恒流模式切换到恒压模式,模式切换平滑稳定。仿真结果表明,在24 V输出电压下,变换器从Buck模式切换到Buck-Boost模式时,输出电压下冲为9.2 mV,变换器从Boost模式切换到Buck-Boost模式时,输出电压下冲为92 mV。变换器在Buck模式与Boost模式下均能实现恒流/恒压模式的自动平滑切换。     

Ultra Fast Fixed-Frequency Hysteretic Buck Converter With Maximum Charging Current Control and Adaptive Delay Compensation for DVS Applications

An integrated DC-DC hysteretic buck converter with ultrafast adaptive output transient response for reference tracking is presented. To achieve the fastest up-tracking speed, the maximum charging current control is introduced to charge up the output voltage with the maximum designed current. For down-tracking, the output is discharged by the load only to save energy. Although the converter works with hysteretic voltage mode control, an adaptive delay compensation scheme is employed to keep the switching frequency constant at 850 kHz to within plusmn2.5% across the whole operation range. The integrated buck converter was fabricated using a 0.35 mum CMOS process. With an input voltage of 3 V, the output voltage can be regulated between 0.5 and 2.5 V. With a load resistor of 10 Omega, the up-tracking speed of the maximum reference step (0.5 to 2.5 V) is 12.5 mus/V. All design features are verified by extensive measurements.     

PWM/PFM双模调制的高效率DC/DC开关电源

利用根据负载电流的大小改变调制模式的方法实现了一种降压型高转换效率的DC/DC开关电源,并采用二次集成的方式在芯片内部集成了功率p-M O SFET。当控制电压占空比小于20%时,采用PFM(Pu lse-F requency M odu lation)模式调制;占空比大于20%时,采用PWM(Pu lse-W idth M odu lation)模式调制,平均转换效率约为93%,输出电流范围可以从0.01 A到3.0 A。当输出驱动电流为3.0 A时,整个调制控制电路的功耗仅为6.0 mW。输入电压为5 V时,负载调整率小于1.5%;负载电流为0.01 A时,线性调整率小于0.5%。     

一种固定关断时间控制模式的升压变换器

采用0.5 μm 40 V BCD工艺,实现了一款基于固定关断时间控制模式的升压型直流-直流转换器.采取了输出电压双路反馈的方式,既提高了瞬态响应速度,也简化了补偿网络的设计.同时提出了一种新型的频率控制电路,克服了固定关断时间控制模式开关频率不固定的缺点.测试结果表明,当芯片输人电压为5 V,输出电压为15 V时,峰...