ScanBist: a multifrequency scan-based BIST method

The authors present ScanBist, a low-overhead, scan-based built-in self-test method, along with its performance in several designs. A novel clock synchronization scheme allows at-speed testing of circuits. This design allows the testing of circuits operating at more than one frequency while retaining the combinational character of the circuit to be analyzed. We can therefore apply scan patterns that will exercise the circuit under test at the system speed, potentially providing a better coverage of delay faults when compared to other self-test methods. Modifications to an existing transition fault simulator account for cases where inputs originating from scan registers clocked at different frequencies drive a gate. We claim to detect transition faults only if the transition originates from the inputs driven by the highest frequency clock. ScanBist is useful at all levels of system packaging assuming that a standard TAP provides the control and boundary scan isolates the circuit from primary inputs and outputs during BIST mode     

Failure diagnosis of structured VLSI

The authors describe a method for diagnosing the failures observed in testing VLSI designs that use the scan-path structure. Diagnosis consists of simulating selected faults after testing using a fault simulator that allows the application of several patterns in parallel. The method is also suitable for signature-based random-pattern testing. The authors discuss diagnostic fault simulation, fault-list generation, relating faults to defects, diagnostic strategy, and random-pattern failures, and they report some experimental results to indicate the procedure's power     

Application of fuzzy logic in resistive fault modeling and simulation

Real defects (e.g., resistive stuck at or bridging faults) in very large-scale integration (VLSI) circuits cause intermediate voltages which cannot be modeled as ideal shorts. In this paper, we first show that the traditional zero-resistance model is not sufficient for fault simulation. Then, we present a resistive fault model for real defects and use fuzzy logic techniques for fault simulation and test pattern generation at the gate level. Our method uses Takagi-Sugeno (TS) fuzzy system to accurately model digital VLSI circuits and produces much more realistic fault coverage compared to the conventional methods. The experimental results include the fault coverage and test-pattern statistics for the ISCAS85 benchmarks.     

Modeling and Testing for Timing Faults in Synchronous Sequential Circuits

Even with proper design, integrated circuits and systems can have timing problems because of physical faults or variation of parameters. The authors introduce a fault model that takes into account timing related failures in both the combinational logic and the storage elements. Using their fault model and the system's requirements for proper operation, the authors propose ways to handle flipflop-to-flipflop delay, path selection, initialization, error propagation, race-around, and anomalous behavior. They discuss the advantages of scan designs like LSSD and the effectiveness of random delay testing.     

基于测量的时延故障诊断

与时延测试相比,时延故障诊断需要更精确的故障模型。该文提出了采用精确测量的时延模型和时延故障模型。在这种模型下,利用电路通路图的原理,得到与被测电路的拓扑结构有关的一个精简测试集。测试集的大小与电路的大小保持线性增长关系;其中的每一个测试对应于一条通路的单跳变敏化向量,将测试集中的单跳变敏化向量送入被测电路,可以用测试仪测量相应通路的延时,得到电路关于此测试集的时延故障症候。该文对时延故障症候提供     

一种高效的小时延故障模拟方法

随着集成电路工艺尺寸不断缩小,电路规模不断增大,要得到很高的小时延故障覆盖率所需的测试向量越来越多,致使小时延故障模拟成本越来越高.为了降低模拟成本,提出一个高效的小时延故障模拟器.模拟方法中引入新的波形表达方式,按电路结构的拓扑顺序进行分级模拟,最后可得到每个故障的检测区间,并且应用时延故障概率分布来计算故障覆盖率.实验结果表明,此方法能大幅降低模拟时间和内存消耗.     

同步时序电路测试生成研究

本文分析了固定故障所反映出的状态变换特征，提出状态变换故障模型。基于无复位时序电路，详细研究了有复位的同步电路测试生成问题及在无复位电路中的应用。最后讨论了故障精简以及启发知识在测试过程中的应用。     

单跳变敏化

出于定量地测量被测通路的传输延迟的考虑 ,文中提出一种基于波形敏化的“单跳变敏化”的概念 ,对波形敏化与传统的通路敏化的区别 ,以及基于波形敏化的单跳变敏化的特点进行了分析 ,并利用带时间参数的测试产生系统 DTGWTP[7] 取得了单跳变敏化的实验结果 .利用单跳变敏化在目标通路的原始输出线上输出单跳变的特点 ,可以进行时延故障诊断 .实验数据表明 ,单跳变敏化的覆盖率远远高于单通路敏化的覆盖率 ,从而能够给时延故障诊断提供更多的有用信息     

基于神经网络观测器的飞控传感器在线故障诊断

为提高无人机飞行安全可靠性,针对飞行控制系统中常出现的传感器故障以及非线性气动力模型参数难以确定的问题,提出了基于BP神经网络观测器估计的故障诊断方法;引用LM改进算法对网络参数进行调整,构造了神经网络观测器模型逼近非线性系统,并运用于飞行控制系统进行在线数字仿真,对垂直陀螺输出卡死故障、恒偏差故障和恒增益故障分别进行仿真分析;仿真结果表明,所设计神经网络观测器可以有效估计系统输出,在线诊断传感器故障。     

Fault tolerance in co-evolutionary communication of EHW modules

Evolvable Hardware (EHW) is a new concept that applies evolutionary algorithms to hardware design. Based on previous work on co-evolutionary communication of EHW modules, this paper investigates the new feature of fault tolerance for this model. A fault model is built for the communication line between EHW modules. The experiment demonstrated in the presentation is the simulation of injecting stuck/bridging faults into an EHW-based serial adder that has been previously developed. The outcomes imply an outstanding feature of fault tolerance in this system with 100% fault coverage, which paves the way for bio-inspired approaches to fault tolerant design instead of the classic ones.     

基于输出时滞方法的非均匀采样数据系统传感器故障检测(英文)

研究一般非均匀采样数据系统鲁棒传感器故障检测设计问题.首先,基于输出时滞方法将非均匀采样数据系统转换成具有时变时滞输出的连续系统;然后,选择故障检测滤波器作为残差产生器,并将故障检测设计问题描述成一个多目标优化问题,即连续时间过程噪声和离散时间测量噪声对残差信号的H∞范数小于一个给定值,同时传感器故障对残差信号的l2增益大于一个给定值,基于输入输出方法以矩阵不等式的形式给出该多目标优化问题有解的充分条件;进一步的,提出一个迭代算法来权衡噪声鲁棒性与故障灵敏度,并将矩阵不等式转换成可解的线性矩阵不等式.最后,对某型飞控系统的仿真实验验证了所提方法的有效性.     

带有推进器故障的船舶动力定位系统的鲁棒滑模容错控制

由于海洋工作环境具有复杂性和不可预测性,船舶动力定位系统的可靠性一直备受关注.针对带有推进器故障的船舶动力定位系统的鲁棒容错控制问题展开研究.首先,建立更一般且统一的推进器故障模型,该模型能全面描述推进器失效、卡死、中断3种故障情形;然后,设计一种不依赖故障检测模块(FDI)和故障信息上下界的自适应滑模控制器, 其中自适应机制用于在线估计故障信息和未知外部扰动的上界,基于李雅普诺夫稳定性理论和滑模控制理论,所设计的自适应滑模控制器能保证船舶动力定位系统在有推进器故障发生和海洋环境外部有界扰动存在情况下的所有信号一致有界;最后,在一艘过驱动船舶模型上进行仿真,其结果验证了所设计方法的有效性.     

An adaptive controller design for linear state-delay systems with actuator failures

In this paper, an adaptive fault tolerant controller is developed for a class of linear state delay systems against actuator failures. To design the controller, all parameters of the system are considered to be unknown, but the time delay value is assumed to be known. Actuator failures are characterized by some unknown system inputs are stuck at some unknown fixed values and at unknown time instants. The adaptive controller is designed based on SPR-Lyapunov approach for the cases with the relative degrees of one and two. Closed-loop system stability and asymptotic output tracking are proved using a suitable Lyapunov-Krasovskii functional for each case and the effectiveness of the proposed results has been illustrated through simulation studies.     

An output delay approach to fault estimation for sampled-data systems

The problem of fault estimation for a class of non-uniformly sampled-data systems is investigated from the time delay point of view in this paper.Firstly,the output delay approach is employed to model the sampled-data system as a continuous-time one with time-varying delay output.Then,based on the analysis of the inapplicability of the adaptive fault diagnosis observer in such class of time-delay systems,a novel augmented fault estimation observer design method is proposed to guarantee the exponential convergence of the estimation errors.Furthermore,an extension to the case of time varying fault estimation for the noisy sampled-data systems is studied.Finally,simulation results of a flight control system are presented to demonstrate the effectiveness of the proposed method.     

基于自适应步长FOA-SVM算法的卡泵故障诊断

为了提高机采井卡泵故障诊断精度,提出一种基于自适应步长FOA-SVM混合算法模型的机采井卡泵诊断方法。在支持向量机对示功图诊断分类的基础上,引入改进的自适应步长果蝇优化算法(AS_FOA)对SVM的惩罚因子和核函数参数进行寻优,避免人为选择参数的盲目性。为了实现果蝇优化算法的全局与局部寻优能力的平衡,应用自适应步长方法对其进行改进,使果蝇算法能够根据上一代的适应度值和当前迭代次数来自适应改变果蝇个体搜索步长。通过采油厂真实示功图数据进行仿真实验,比较AS_FOA、FOA、GA三种算法在支持向量机参数寻优中的性能。实验结果表明,AS_FOA收敛速度更快,寻优能力更佳。与其他算法相比,AS_FOA-SVM混合算法模型在卡泵故障诊断中准确率更高,泛化能力更强。     

控制棒驱动机构智能感知与自适应控制系统设计及仿真验证

控制棒驱动机构作为核反应堆控制和核安全保护系统的执行机构,对其运行状态进行有效监测是防止反应堆发生控制棒卡棒、滑棒和驱动失灵,保障核反应堆安全经济运行的必要手段。本文在研究分析控制棒驱动机构线圈电流和振动信号特征的基础上构建了控制棒驱动机构状态判别与故障诊断模型,并基于dSPACE实时仿真系统建立了控制棒驱动系统自适应控制数字化模型和控制棒驱动机构智能感知与自适应控制实验样机。通过功能验证,证明该系统能根据电流和振动信号实现对控制棒驱动机构正常运行工况和典型故障模式的实时判别、故障诊断与自适应控制,运行状态识别准确率达到99.2%以上,为后续核反应堆智能设备的研制提供参考。     

Compositionality and correctness of fault tolerant patterns in HOL4

In the development of critical systems, it is common practice to make use of redundancy in order to achieve higher levels of reliability. There are well established design patterns that introduce redundancy and that are widely documented and adopted by the industry. However there have been few attempts to formally verify them. In this work, we modelled in the HOL4 system such design patterns, which we call here fault tolerant patterns. We illustrate our approach by modelling three classical fault tolerant patterns: Homogeneous Redundancy, Heterogeneous Redundancy and Triple Modular Redundancy. Our model takes into account that the original system (without redundancy) computes a certain function with some delay and is amenable to random failures.We proved that our fault tolerant patterns preserve the behaviour of its replicated subsystems. The notion of correctness adopted makes use of interval arithmetic and is restricted to functional behaviour. Timing is not regarded as part of the functional behaviour in this work. Therefore, real-time systems are not the focus of our approach. We also proved that our fault tolerant patterns are compositional in the sense that we can apply fault tolerant patterns consecutively and for an arbitrary number of times. The consecutive application of our patterns still results in a system that computes a certain function with some delay and amenable to random failures. We developed a case study that verifies that a fault tolerant pattern applied to a simplified avionic Elevator Control System preserves its original behaviour. This work was done in collaboration with the Brazilian aircraft manufacturer Embraer.     

An Automatic Test-Generation System for Large Digital Circuits

A new test-generation system (FUTURE) for large digital circuits (more than 10K gates) is based on a nine-valued FAN algorithm. Fault simulation adopts a concurrent simulation adopts a concurrent simulation technique. The system consists of four major modules: fault modeling, random pattern generation, algorithmic pattern generation, and fault simulation. The system can be a powerful CAD tool and effectively generate test patterns for large sequential circuits with Scan Path.     

An agent-based model of the influence of neighbourhood design on daily trip patterns

Post-war suburban neighbourhoods are often criticised for promoting automobile use and leading to problems such as traffic congestion, air pollution, automobile reliance, limited transit access and reduced social interactions. Newer designs, such as the neo-traditional and fused grid designs, aim to ameliorate these problems. But neighbourhood trip and traffic patterns are the collective outcome of individual decisions. Such phenomena often cannot be adequately explained by traditional aggregated methods. With consideration of personal characteristics, preferences and feedbacks between pedestrian and automobile traffic, an agent-based trip and traffic simulation model was developed and calibrated based on data from Ottawa, Ontario. Experiments show that the neo-traditional and fused grid designs generally provide more pedestrian benefits such as fewer crossings, shorter facility-access distance, less emission exposure and more social interaction opportunities, but these benefits also depend on the implementation such as the location of pedestrian-only routes. The influences are often complex. For example, elimination of pedestrian-only routes may lead to more social opportunities, but also much higher emission exposure. The study shows the importance of complex system based study of urban and neighbourhood designs, and the promise of a meso-level approach to urban and transportation simulation that can improve planning outcomes.