基于ARM7TDMI的SoC芯片的FPGA验证平台设计

针对片上系统(SoC)开发周期较长和现场可编程门阵列(FPGA)可重用的特点,设计了基于ARM7TDMI处理器核的SoC的FPGA验证平台,介绍了怎样利用该平台进行软硬件协同设计、IP核验证、底层硬件驱动和实时操作系统设计验证.使用该平台通过软硬件协同设计,能够加快SoC系统的开发.整个系统原理清晰,结构简单,扩展灵活、方便.     

系统芯片的关键技术及发展方向

系统芯片,即(SoC),将包含处理器、存储器和片上逻辑等的一个系统集成在单一的芯片上。SoC所特有的功能强、速度高、体积小、成本低、功耗低等优点使得其技术不断发展,应用越来越广泛。文章首先探讨了系统芯片(SoC)的特点及分类,接着详细阐述了开发SoC所需IP核设计与复用、软硬件协同设计、软硬件协同设计等关键技术。分析了基于平台设计方法的优点,并介绍了SoC的一体化测试流程、共时测试等SoC测试新技术。     

基于Cortex＿M3内核的SoC芯片软硬件协同验证平台设计实现

<正>片上系统(SystemonChip,SoC)一般包括可配置的通用IP核和用户自行设计的专用IP核组成的系统^[1]。SoC芯片的规模、复杂度和集成度日益增加，芯片验证的时间占据了整个研发周期的三分之二，验证的充分性有效地保证了芯片投片的成功率^[2]。在基于处理器IP设计构建出SoC芯片系统后，如何对系统架构和各功能进行验证的复杂度也在不断提高。在SoC芯片设计阶段的验证，通常分为两个阶段来进行验证。第一个阶段是在设计初期，使用软硬件协同仿真技术进行早期验证与开发，在此过程中主要是利用仿真技术对硬件系统功能进行验证以及设计漏洞的调试，是SoC设计中非常重要的环节。     

SOC设计的软硬件协同验证研究

软硬件协同验证是SOC的核心技术.通过分析SOC验证方法与软硬件协同验证技术,提出C与平台相合的协同验证方法.该方法是在系统级用SystemC确定SOC系统的体系框架、存储量大小、接口IO与验证软件算法的可行性、有效性、可靠性.在硬件设计中,利用验证可重用的硬IP和软IP快速建立SOC系统,并把核心IP集成嵌入进SOC系统中.在软件设计中,利用成熟的操作系统与应用系统来仿真验证SOC芯片的功能与性能.该方法应用于一个基于ARM7TDMI的SOC设计,大大缩短了验证时间,提高了验证效率与质量.     

基于SystemC的事务级协同验证方法研究

随着深亚微米集成电路技术的发展,系统芯片上将集成越来越多的IP核,这些IP核不仅包括为数众多的存储器模块、控制电路模块、时钟电路模块、I/O模块和A/D、D/A模块,还包括很多MCU、MPU和DSP,基于IP核的软硬件协同设计技术已经成为系统芯片发展的必然趋势。软硬件协同设计要求系统功能一部分由硬件实现,而其余部分则由软件实现,系统硬件实现的部分通常是由VHDL、Verilog等硬件编程语言描述其模型,然后进行仿真验证,最后利用EDA工具综合成门级网表并进行版图级的布局布线,而系统软件实现的部分则通常由C、C 等高级语言描述,并最…     

片上系统设计中软硬件协同验证方法的研究

讨论一种面向片上系统(SOC)设计的基于指令集模拟器和硬件模拟器的软硬件协同验证方法。该方法能够在SOC设计的早期对整个系统功能进行验证,能够为设计者提供一个纯虚拟的软硬件协同验证环境。重点讨论协同模拟过程中软硬件交互事件的产生和处理方法,以及软硬件模拟器之间的同步和优化方法,并且给出了事件驱动硬件模拟器的协同模拟控制算法。最后给出了一个基于ARM7TDMI的设计验证实例。     

一种32 Bit SoC软硬件协同验证环境的实现

软硬件协同验证是系统芯片设计的重要组成部分。针对基于32 Bit CPU核的某控制系统芯片的具体要求,提出了一种系统芯片软硬件协同验证策略,构建了一个软硬件协同验证环境。该环境利用处理器内核模型支持内核指令集的特性运行功能测试程序,实现SoC软硬件的同步调试,并能够快速定位软硬件的仿真错误点,有效提高了仿真效率。该SoC软硬件协同验证环境完成了设计目的,并对其他系统芯片设计具有一定的参考价值。     

一种基于嵌入式微处理器内核模块的测试

基于可复用的嵌入式IP内核模块的系统级芯片（SoC）设计方法使测试面临新的挑战。文章针对IP内核模块测试断面临的技术难点，介绍了IP核模块实现测试所需要构建的硬件环境和通用结构．并以嵌入ARM微处理器棱的SoC为例，提出了具体的测试解决方案。     

基于ARM7TDMI的SoC芯片的原型验证

验证是SoC（系统芯片）设计的重要环节,FPGA原型验证平台能以实时的方式进行软硬件协同验证,缩短SoC的开发周期,验证系统级芯片软硬件设计的正确性,降低SoC系统的开发成本。本文介绍了基于ARM7TDMI处理器核的SoC芯片设计项目,提出相应的FPGA软硬件协同设计与验证的方案,并在此SoC芯片开发过程中得以实施,取得良好效果。     

片上系统验证研究

在数字IC设计中，通常情况下，一般功能芯片验证只涉及到单方面的验证，比如功能仿真、静态时序分析(STA)等。片上系统(SOC)的验证，则是结合了各种验证，而且需要不同于一般功能芯片验证的验证方法，比如软硬件协同验证、FPGA验证、基于IP的验证，等等。文章对这三种验证方法进行了详细的论述。     

Development of the readout system for waveguide multilayer optical card

Waveguide multilayer optical card （WMOC） is a novel storage device of three-dimensional optical information. An advanced readout system fitting for the WMOC is introduced in this paper. The hardware mainly consists of the light source for reading, WMOC, motorized stages addressing unit, microscope imaging unit, CCD detecting unit and PC controlling ＆ processing unit. The movement of the precision motorized stage is controlled by the computer through Visual Basic （VB） language in software. A control panel is also designed to get the layer address and the page address through which the position of the motorized stages can be changed. The WMOC readout system is easy to manage and the readout result is directly displayed on computer monitor.     

Nanoimprint Lithography -A Next Generation High Volume Lithography Technique

IntroductionNanoimprint Lithography is a well-acknowl-edged low cost, high resolution, large area pattern-ing process. It includes the most promising methods,high-pressure hot embossing lithography (HEL) [2],UV-cured imprinting (UV-NIL) [3] and micro contactprinting (m-CP, MCP) [4]. Curing of the imprintedstructures is either done by subsequent UV-lightexposure in the case of UV-NIL or by cooling downbelow the glass transition temperature of the ther-moplastic material in case of HEL…     

Collinear phase-matching study of terahertz-wave generation via difference frequency mixed in GaAs and Inp

The collinearly phase-matching condition of terahertz-wave generation via difference frequency mixed in GaAs and InP is theoretically studied. In collinear phase-matching, the optimum phase-matching wave hands of these two crystals are calculated. The optimum phase-matching wave bands in GaAs and lnP are 0.95-1.38μm and 0.7-0.96μm respectively. The influence of the wavelength choice of the pump wave on the coherent length in THz-wave tuning is also discussed. The influence of the temperature alteration on the phase-matching and the temperature tuning properties in GaAs crystal are calculated and analyzed. It can serve for the following experiments as a theoretical evidence and a reference as well.     

Effects of the alloy compositions on the phonon-polaritons in ternary mixed crystals

Composition dependence of bulk and surface phonon-polaritons in ternary mixed crystals are studied in the framework of the modified random-element-isodisplacement model and the Bom-Huang approximation. The numerical results for Several Ⅱ - Ⅵ and Ⅲ- Ⅴ compound systems are performed, and the polariton frequencies as functions of the compositions for ternary mixed crystals AlxGa1-xAs, GaPxAS1-x, ZnSxSe1-x, GaAsxSb1-x, GaxIn1-xP, and ZnxCd1-xS as examples are given and discussed. The results show that the dependence of the energies of two branches of bulk phonon-polaritons which have phonon-like characteristics, and surface phonon-polaritons on the compositions of ternary mixed crystals are nonlinear and different from those of the corresponding binary systems.     

Influence of PVK ： NPB hole transporting layer on the characteristics of organic light-emitting devices

A doping system consisting of NPB and PVK is employed as a composite hole transporting layer （CHTL）. By adjusting the component ratio of the doping system, a series of devices with different concentration proportion of PVK ： NPB are constracted. The result shows that doping concentration of NPB enhances the competence of hole transporting ability, and modifies the recombination region of charge as well as affects the surface morphology of doped film. Optimum device with a maximum brightness of 7852 cd/m^2 and a power efficiency of 1.75 lm/W has been obtained by choosing a concentration proportion of PVK ： NPB at 1：3.     

New insert layer structure OLEDs

An insert layer structure organic electroluminescent device（OLED） based on a new luminescent material （Zn（salen）） is fabricated. The configuration of the device is ITO/CuPc/NPD/Zn（salen）/Liq/LiF/A1/CuPc/NPD/Zn（salen）/Liq/LiF/A1. Effective insert electrode layers comprising LiF（1nm）/Al（5 nm） are used as a single semitransparent mirror, and bilayer cathode LiF（1 nm）/A1（100 nm） is used as a reflecting mirror. The two mirrors form a Fabry-Perot microcavity and two emissive units. The maximum brightness and luminous efficiency reach 674 cd/m^2 and 2.652 cd/A, respectively, which are 2.1 and 3.7 times higher than the conventional device, respectively. The superior brightness and luminous efficiency over conventional single-unit devices are attributed to microcavity effect.     

Analysis of error performance on Turbo coded FDPIM

Due to variable symbol length of digital pulse interval modulation（DPIM）, it is difficult to analyze the error performances of Turbo coded DPIM. To solve this problem, a fixed-length digital pulse interval modulation（FDPIM） method is provided. The FDPIM modulation structure is introduced. The packet error rates of uncoded FDPIM are analyzed and compared with that of DPIM. Bit error rates of Turbo coded FDPIM are simulated based on three kinds of analytical models under weak turbulence channel. The results show that packet error rate of uncoded FDPIM is inferior to that of uncoded DPIM. However, FDPIM is easy to be implemented and easy to be combined, with Turbo code for soft-decision because of its fixed length. Besides, the introduction of Turbo code in this modulation can decrease the average power about 10 dBm, which means that it can improve the error performance of the system effectively.     

A method for calculating the center position of collimated light

It is a key problem to accurately calculate beam spots＇ center of measuring the warp by using a collimated laser. A new method, named double geometrical center method （DGCM）, is put forward for the first time. In this method, a plane wave perpendicularly irradiates an aperture stop, and a charge couple device （CCD） is employed to receive the diffraction-beam spots, then the geometrical centers of the fast and the second diffraction-beam spots are calculated respectively, and their mean value is regarded as the center of datum beam. In face of such adverse instances as laser intension distributing defectively, part of the image being saturated, this method can still work well. What＇s more, this method can detect whether an unacceptable error exits in the courses of image receiving, processing and calculating. The experimental results indicate the precision of this method is high.     

Resolution Enhancement Technology:Integrated Process Solutions using OPC

DUV lithography, using the 248 nm wavelength, is a viable manufacturing option for devices with features at 130 nm and less. Given the low kl value of the lithography, integrated process development is a necessary method for achieving acceptable process latitude. The application of assist features for rule based OPC requires the simultaneous optimization of the mask, illumination optics and the resist.Described in this paper are the details involved in optimizing each of these aspects for line and space imaging.A reference pitch is first chosen to determine how the optics will be set. The ideal sigma setting is determined by a simple geometrically derived expression. The inner and outer machine settings are determined, in turn,with the simulation of a figure of merit. The maximum value of the response surface of this FOM occurs at the optimal sigma settings. Experimental confirmation of this is shown in the paper.Assist features are used to modify the aerial image of the more isolated images on the mask. The effect that the diffraction of the scattering bars (SBs) has on the image intensity distribution is explained. Rules for determining the size and placement of SBs are also given.Resist is optimized for use with off-axis illumination and assist features. A general explanation of the material' s effect is discussed along with the affect on the through-pitch bias. The paper culminates with the showing of the lithographic results from the fully optimized system.     

Cost-effective test solutions for smart card and other integrated flash applications

From its emergence in the late 1980s as a lower cost alternative to early EEPROM technologies, flash memory has evolved to higher densities and speedsand rapidly growing acceptance in mobile applications.In the process, flash memory devices have placed increased test requirements on manufacturers. Today, as flash device test grows in importance in China, manufacturers face growing pressure for reduced cost-oftest, increased throughput and greater return on investment for test equipment. At the same time, the move to integrated flash packages for contactless smart card applications adds a significant further challenge to manufacturers seeking rapid, low-cost test.