中波碲镉汞/钝化层界面电学特性研究

HgCdTe表面/界面特性对器件性能具有重要的影响,表面/界面的状态主要依赖于表面处理和钝化工艺。采用Br2/CH3OH腐蚀液对液相外延(LPE)生长的中波HgCdTe薄膜进行表面处理后,使用Cd Te/Zn S复合钝化技术进行表面钝化,制备了相应的MIS器件并进行器件C-V测试。结果表明,HgCdTe/钝化层界面固定电荷极性为正,面密度为2.1×1011 cm-2,最低快界面态密度为1.43×1011 cm-2·e V-1,在10 V栅压极值下慢界面态密度为4.75×1011 cm-2,较低的快界面态密度体现出了CdTe/ZnS复合钝化技术的优越性。     

Au/CdTe+ZnS/HgCdTe双层介质膜MIS器件的制备及研究

通过介质膜ZnS、CdTe薄膜材料的Ar+束溅射沉积研究,结合HgCdTe器件工艺,成功制备了以ZnS、CdTe双层介质膜为绝缘层的HgCdTeMIS器件;通过对器件的C-V特性实验分析,获得了CdTe/HgCdTe界面电学特性参数.实验表明溅射沉积介质膜CdTe+ZnS对HgCdTe的表面钝化已经可以满足HgCdTe红外焦平面器件表面钝化的各项要求.     

Au／CdTe＋ZnS／HgCdTe双层介质膜MIS器件的制备及研究

通过介质膜ZnS、CdTe薄膜材料的Ar^ 束溅射沉积研究,结合HgCdTe器件工艺,成功制备了以ZnS、CdTe双层介质膜为绝缘层的HgCdTe MIS器件;通过对器件的C－V特性实验分析,获得了CdTe/HgCdTe界面电学特性参数。实验表明：溅射沉积介质膜CdTe ZnS对HgCdTe的表面钝化已经可以满足HgCdTe红外焦麦面器件表面钝化的各项要求。     

长波碲镉汞材料阳极氧化膜/ZnS界面的电学特性参数

通过碲镉汞阳极氧化膜和磁控溅射ZnS膜,结合HgCdTe器件工艺,成功制备了以阳极氧化膜和磁控溅射ZnS双层钝化膜为绝缘层的“长波弱P”型HgCdTe MIS器件.通过对器件的C-V特性实验分析,获得了长波HgCdTe材料的阳极氧化膜/ZnS界面电学特性参数.并通过获得的界面参数,计算了阳极氧化和ZnS的双层钝化膜的表面复合速度.并对MIS器件的变温C-V特性进行了实验和分析.     

基于栅控二极管研究碲镉汞器件表面效应

采用不同工艺生长了CdTe/ZnS复合钝化层,制备了相应的长波HgCdTe栅控二极管器件并进行了不同条件下I-V测试分析.结果表明,标准工艺制备的器件界面存在较高面密度极性为正的固定电荷,在较高的反偏下形成较大的表面沟道漏电流,对器件性能具有重要的影响.通过钝化膜生长工艺的改进有效减小了器件界面固定电荷面密度,使HgCdTe表面从弱反型状态逐渐向平带状态转变,表面效应得到有效抑制,器件反向特性获得显著改善.此外,基于最优的工艺条件制备的器件界面态陷阱数量得到大幅降低,器件稳定性增强;同时器件R_0A随栅压未发生明显地变化.     

分子束外延的CdTe在碲镉汞中波器件中钝化效果

采用分子束外延技术（MBE）制备了碲化镉（CdTe）原位钝化的中波碲镉汞（HgCdTe）材料。原子力显微镜（AFM）和扫描电子显微镜（SEM）测试结果表明,分子束原位外延的CdTe可见cross-hatch,表面粗糙度为1～2 nm,CdTe和HgCdTe界面结合紧密。微波光导测试结果显示,77 K时,与表面处理后非原位CdTe钝化的HgCdTe材料相比,CdTe原位钝化的HgCdTe材料的少子寿命较大。制备了分子束外延CdTe原位钝化的中波HgCdTe光伏器件,和相同材料上的非原位CdTe/ZnS双层钝化制备的器件I-V特性相似。     

HgCdTe MIS器件制备及其C-V特性研究

通过在P-HgCdTe上生长阳极硫化膜和ZnS介质钝化层，制备出了性能较好的MIS器件，并通过对MIS器件C-V特性的分析，获得了ZnS/自身钝化膜/P-HgCdTe的界面特性。所测的界面电荷密度在10^10-10^11cm^-2之间，平带电压在2V以下。     

HgCdTe MIS器件的制备及其界面电学特性的研究（上）

介绍了HgCdTe MIS器件的制备及由其C-V特性计算、分析界面电学特性的基本原理和步骤．利用MIS器件高频C-V曲线耗尽区的电学特性推导了衬底杂质浓度随深度分布的计算公式。     

退火处理对锑化铟MIS器件C-V特性的影响

采用原子层沉积技术制备Al2O3薄膜作为InSb材料介电层,制备了MIS器件,研究了金属化后不同退火温度对界面特性的影响.利用C-V测试表征了MIS(metal-insulator-semiconductor)器件的界面特性,结果表明Al2O3介电层引入了表面固定正电荷,200℃和300℃退火处理可有效减小慢界面态密度...     

基于磷钝化栅介质的1.2kV 4H-SiC DMOSFET

本文对比了NO退火和磷掺杂两种栅钝化工艺,其中磷钝化采用了平面扩散源进行掺杂,通过C-V特性进行了4H-SiC/SiO₂界面特性评价,使用Terman法分析计算获得距导带底0.2-0.4eV范围内界面态密度.结果表明引入磷比氮能更有效降低界面态密度,提高沟道载流子迁移率.其次,对比了两种栅钝化工艺制备的4H-SiC DMOSFET器件性能,实验表明采用磷钝化工艺处理的器件性能更优.最后,基于磷掺杂钝化工艺首次制备出击穿电压为1200V、导通电阻为20mΩ、漏源电流为75 A、阈值电压为2.4V的4H-SiC DMOSFET.     

Effects of Inductively Coupled Plasma Hydrogen on Long-Wavelength Infrared HgCdTe Photodiodes

Bulk passivation of semiconductors with hydrogen continues to be investigated for its potential to improve device performance. In this work, hydrogen-only inductively coupled plasma (ICP) was used to incorporate hydrogen into long-wavelength infrared HgCdTe photodiodes grown by molecular-beam epitaxy. Fully fabricated devices exposed to ICP showed statistically significant increases in zero-bias impedance values, improved uniformity, and decreased dark currents. HgCdTe photodiodes on Si substrates passivated with amorphous ZnS exhibited reductions in shunt currents, whereas devices on CdZnTe substrates passivated with polycrystalline CdTe exhibited reduced surface leakage, suggesting that hydrogen passivates defects in bulk HgCdTe and in CdTe.     

n-HgCdTe光导器件的两种表面钝化研究

利用 Ar 束溅射沉积技术实现了 Cd Te薄膜的低温生长 ,利用电化学方法进行了 Hg Cd Te表面自身阳极氧化膜的生长 ,利用生长的 Cd Te介质膜和 Hg Cd Te表面自身阳极氧化膜对 n- Hg Cd Te光导器件进行了表面钝化 .对两种器件的电阻、各项性能指标进行了测量分析 ,实验表明得到的 Cd Te/ Hg Cd Te界面质量已达到器件实用化水平 .     

Surface passivation of HgCdTe by CdZnTe and its characteristics

In this paper, we report the results of capacitance-voltage measurements conducted on several metal-insulator semiconductor (MIS) capacitors in which HgCdTe surfaces are treated with various surface etching and oxidation processes. CdZnTe passivation layers were deposited on HgCdTe surfaces by thermal evaporation after the surfaces were etched with 0.5?2.0% bromine in methanol solution, or thin oxide layers (t_ox ～ few ten Å) were grown on the surfaces, in order to investigate effects of the surface treatments on the electrical properties of the surfaces, as determined from capacitance-voltage (C-V) measurements at 80K and 1 MHz. A negative flat band voltage has been observed for MIS capacitors fabricated after etching of HgCdTe surfaces with bromine in methanol solutions, which is reported to make the surface Te-rich. It is inferred that residual Te on the surface is a positive charge, Te⁴⁺. C-V characteristics for MIS capacitors fabricated on oxide surfaces grown by air-exposure and electrolytic process have shown large hysteresis effects, from which it is inferred that imperfect and electrically active oxide compounds and HgTe particles near the surface become slow interface states.     

HgCdTe MIS器件的制备及其界面电学特性的研究(下)

介绍了用高、低频组合电容法测量HgCdTe MIS器件钝化层界面态密度能量分布的基本原理和步骤．研究表明,自身阳极硫化 单层ZnS对HgCdTe的表面钝化已经达到光伏焦平面器件表面钝化的各项要求．     

The interface of metalorganic chemical vapor deposition-CdTe/HgCdTe

The metalorganic chemical vapor deposition (MOCVD) growth of CdTe on bulk n-type HgCdTe is reported and the resulting interfaces are investigated. Metalinsulator-semiconductor test structures are processed and their electrical properties are measured by capacitance-voltage and current-voltage characteristics. The MOCVD CdTe which was developed in this study, exhibits excellent dielectric, insulating, and mechano-chemical properties as well as interface properties, as exhibited by MIS devices where the MOCVD CdTe is the single insulator. Interfaces characterized by slight accumulation and a small or negligible hysteresis, are demonstrated. The passivation properties of CdTe/ HgCdTe heterostructures are predicted by modeling the band diagram of abrupt and graded P-CdTe/n-HgCdTe heterostructures. The analysis includes the effect of valence band offset and interface charges on the surface potentials at abrupt hetero-interface, for typical doping levels of the n-type layers and the MOCVD grown CdTe. In the case of graded heterojunctions, the effect of grading on the band diagram for various doping levels is studied, while taking into consideration a generally accepted valence band offset. The MOCVD CdTe with additional pre and post treatments and anneal form the basis of a photodiode with a new design. The new device architecture is based on a combination of a p-on-n homojunction in a single layer of n-type HgCdTe and the CdTe/HgCdTe heterostructure for passivation.     

Electrical and structural properties of epitaxial CdTe/HgCdTe interfaces

In this study, CdTe epilayers were grown by metalorganic chemical vapor deposition on epitaxial HgCdTe with the purpose of developing suitable passivation for HgCdTe photodiodes. Two types of CdTe layers were investigated. One was grown directly,in situ, immediately following the growth of HgCdTe. The second type of CdTe was grown indirectly, on top of previously grown epitaxial HgCdTe samples. In this case, the surface of the HgCdTe was exposed to ambient atmosphere, and a surface cleaning procedure was applied. The material and structural properties of the CdTe/HgCdTe interfaces were investigated using secondary ion mass spectroscopy, Auger electron spectroscopy, Rutherford back scattering, and x-ray double crystal diffractometry techniques. Electrical properties of the CdTe/HgCdTe heterostructure were determined by capacitance-voltage (C-V) characterization of Schottky barrier devices and metal insulator semiconductor devices. Also, a preliminary current-voltage characterization of n⁺ p photodiodes was performed. A theoretical model suitable for analysis of graded heterojunction devices was used for interpretation of C-V measurements.     

Photo-enhanced native oxidation process forHg0.8Cd0.2Te photoconductors

Proposes an easy and reproducible vapor-phase photo surface treatment method to improve the device performance of the Hg_0.8 Cd_0.2Te photoconductive detector. We explore the effect of surface passivation on the electrical and optical properties of the HgCdTe photoconductor. Experimental results, including surface mobility, surface carrier concentration, metal-insulator-semiconductor leakage current, 1/f noise voltage spectrum, the 1/f knee frequency, responsivity R_λ, and specific detectivity D* for stacked photo surface treatment and ZnS or CdTe passivation layers are presented. These data are all directly related to the quality of the interface between the passivation layer and the HgCdTe substrate. We found that, by inserting a photo native oxide layer, we can shift the 1/f knee frequency, reduce the noise power spectrum, and achieve a lower surface recombination velocity S. A higher D* can also be achieved. It was also found that HgCdTe photoconductors passivated with stacked layers show improved interface properties compared to the photoconductors passivated only with a single ZnS or CdTe layer