MBE生长InAs薄膜输运性质的研究

在ＧａＡｓ衬底上ＭＢＥ生长大失配ＩｎＡｓ薄膜，虽然在界面处存在大量位错，但仍能在ＩｎＡｓ薄膜中得到较高的电子迁移率．掺Ｓｉ样品的迁移率比同厚度未掺杂的样品要高．且对未掺杂的ＩｎＡｓ薄膜，迁移率在室温附近有一个明显的极小值．这些反常行为可以通过体层和界面层电子的并联电导模型来解释．     

GaAs基InAs/AlSb二维电子气结构的生长优化（英文）

采用分子束外延设备(MBE),外延生长了InAs/AlSb二维电子气结构样品.样品制备过程中,通过优化AlGaSb缓冲层厚度和InAs/AlSb界面厚度、改变AlSb隔离层厚度,分别对比了材料二维电子气特性的变化,并在隔离层厚度为5nm时,获得了室温电子迁移率为20500cm~2/V·s,面电荷密度为2.0×1012/cm~2的InAs/AlSb二维电子气结构样品,为InAs/AlSb高电子迁移率晶体管的研究和制备提供了参考依据.     

GaAs基InAs/AlSb二维电子气结构的生长优化

采用分子束外延设备 (MBE) , 外延生长了InAs/AlSb二维电子气结构样品.样品制备过程中, 通过优化AlGaSb缓冲层厚度和InAs/AlSb界面厚度、改变AlSb隔离层厚度, 分别对比了材料二维电子气特性的变化, 并在隔离层厚度为5nm时, 获得了室温电子迁移率为20500cm2/V·s, 面电荷密度为2.0×1012/cm2的InAs/AlSb二维电子气结构样品, 为InAs/AlSb高电子迁移率晶体管的研究和制备提供了参考依据.     

HgCdTe多载流子体系的定量迁移率谱分析

本文利用定量迁移率谱分析技术，通过研究样品霍尔系数和电阻率对磁场强度的依赖关系，获得了样品中参与导电的电子和空穴的浓度和迁移率，结果表明了定量迁移率谱分析方法具有很高的准确性和可靠性，并且它对样品中少子的贡献非常敏感．该方法可以成为一种分析半导体材料和器件的电学特性常规的测试手段     

GaAs／AlGaAs二维电子气（2DEG）散射机理研究

本文采用三角阱近似，计算了ＧａＡｓ／ＡｌＧａＡｓ二维电子气（２ＤＥＧ）电子只占据基态子带时，由极性光学声子、声学形变势、声学压电势、远程电离杂质、本底电离杂质、合金无序以及界面粗糙等七种主要的散射机制决定的电子迁移率与温度、２ＤＥＧ浓度、本底电离杂质沈度、以及界面不平整度等的关系．理论计算结果与实验符合很好．就作者所知考虑上述七种散射机制计算２ＤＥＧ电子迁移率的工作，以前未见报道．     

退火与未退火MM-HEMT材料中二维电子气的磁输运特性研究

采用变磁场霍耳测量,在1.5～90K的温度范围内,研究了经过快速热退火与未退火掺杂MM-HEMT材料中二维电子气的输运特性.通过对Shubnikov-de Hass(SdH)振荡曲线进行快速Fourier变换分析,获得了该样品沟道中子能带上的电子浓度等信息,并采用迁移率谱(MS)和多载流子拟合过程法(MFC)相结合的方法分析了该样品中子能带电子的浓度和迁移率.该方法与SdH测量所获得的结果符合得很好,都证实了在很高的温度下退火将影响样品沟道中电子的浓度和迁移率,对材料性能起着不可低估的作用.     

SiO2/SiC界面对4H-SiC n-MOSFET反型沟道电子迁移率的影响

提出了一种基于器件物理的4H-SiC n-MOSFET反型沟道电子迁移率模型.该模型包括了界面态、晶格、杂质以及表面粗糙等散射机制的影响,其中界面态散射机制考虑了载流子的屏蔽效应.利用此模型,研究了界面态、表面粗糙度等因素对迁移率的影响,模拟结果表明界面态和表面粗糙度是影响沟道电子迁移率的主要因素.其中,界面态密度决定了沟道电子迁移率的最大值,而表面粗糙散射则制约着高场下的电子迁移率.该模型能较好地应用于器件模拟.     

高电子迁移率晶体管新结构

介绍了通过插入ＩｎＡｓ层到ＩｎＧａＡｓ沟道中，改善了ＩｎＡｌＡｓ／ＩｎＧａＡｓ高电子迁移率晶体管（ＨＥＭＴ）的性质，合适的ＩｎＡｓ层厚度和准确的插入位置会使在３００Ｋ时此结构的ＨＥＭＴ比普通结构的ＨＥＭＴ的迁移率和电子速度分别提高３０％和１５％。     

SiO_2/SiC界面对4H-SiC n-MOSFET反型沟道电子迁移率的影响

提出了一种基于器件物理的4 H- Si C n- MOSFET反型沟道电子迁移率模型.该模型包括了界面态、晶格、杂质以及表面粗糙等散射机制的影响,其中界面态散射机制考虑了载流子的屏蔽效应.利用此模型,研究了界面态、表面粗糙度等因素对迁移率的影响,模拟结果表明界面态和表面粗糙度是影响沟道电子迁移率的主要因素.其中,界面态密度决定了沟道电子迁移率的最大值,而表面粗糙散射则制约着高场下的电子迁移率.该模型能较好地应用于器件模拟.     

界面态对AlGaAs/GaAs HEMT直流输出特性的影响

本文利用高电子迁移率晶体管（ＨＥＭＴ）的直流输出分析模型,首次定量地分析了界面态对ＡｌＧａＡｓ／ＧａＡｓＨＥＭＴ直流输出特性的影响．考虑界面态的作用,详细分析了不同界面态密度对ＨＥＭＴ的ＩＶ特性和器件跨导的影响．我们的研究结果表明随着界面态密度的增加,栅极电压对电流的控制能力减小,从而使器件的跨导减小．     

Magneto-transport characterization using quantitative mobility-spectrum analysis

A quantitative mobility spectrum analysis (QMSA) of experimental Hall and resistivity data as a function of magnetic field is presented. This technique enables the conductivity contribution of bulk majority carriers to be separated from that of other species such as thermally generated minority carriers, electrons, and holes populating n and p doped regions, respectively, and two-dimensional species at surfaces and interface layers. Starting with a suitable first trial function such as the Beck and Anderson mobility spectrum analysis (MSA), a variation on the iterative procedure of Dziuba and Gorska is used to obtain a mobility spectrum which enables the various carrier species present in the sample to be identified. The QMSA algorithm combines the fully automated execution and visually meaningful output format of MSA with the quantitative accuracy of the conventional least-squares multi-carrier fitting procedure. Examples of applications to HgCdTe infrared detector materials and InAs/GaSb quantum wells are discussed. The ultimate goal of this paper is to provide an automated, universal algorithm which may be used routinely in the analysis and interpretation of magneto-transport data for diverse semiconductor materials and bandgap engineered structures.     

Universality of electron mobility curves in MOSFETs: a Monte Carlostudy

The universal behavior of electron mobility when plotted versus the effective field is physically studied. Due to charged centers in the silicon bulk, the oxide, and the interface, Coulomb scattering is shown to be responsible for the deviation of mobility curves. Silicon bulk-impurities have a double effect: (a) Coulomb scattering due to the charge of these impurities themselves, and (b) reduction of screening caused by the loss of inversion charge when the depletion charge is increased. The electric-field region in which mobility curves behave universally regardless of bulk-impurity concentration, substrate bias, or interface charge has been determined for state-of-the-art MOSFETs. Finally, this study shows that electron mobility must be a function of the inversion and the depletion charges rather than a simple function of the effective field     

A physical model on electron mobility in InGaAs nMOSFETs with stacked gate dielectric

An inversion-channel electron mobility model for InGaAs n-channel metal–oxide-semiconductor field-effect transistors (nMOSFETs) with stacked gate dielectric is established by considering scattering mechanisms of bulk scattering, Coulomb scattering of interface charges, interface-roughness scattering, especially remote Coulomb scattering and remote interface-roughness scattering. The simulation results are in good agreement with the experimental data. The effects of device parameters on degradation of electron mobility, e.g. interface roughness, dielectric constant and thickness of high-k layer/interlayer, and the doping concentration in the channel, are discussed. It is revealed that a tradeoff among the device parameters has to be performed to get high electron mobility with keeping good other electrical properties of devices.     

Dependence of electron channel mobility on Si-SiO2interface microroughness

The effect of the Si-SiO₂ interface microroughness on the electron channel mobility of n-MOSFETs was investigated. The surface microroughness was controlled by changing the mixing ratio of NH₄ OH in the NH₄OH-H₂O₂-H₂O solution in the RCA cleaning procedure. The gate oxide was etched, following the evaluation of the electrical characteristics of MOS transistors, to measure the microroughness of the Si-SiO₂ interface with scanning tunneling microscopy (STM). As the interface microroughness increases, the electron channel mobility, which can be obtained from the current-voltage characteristics of the MOSFET, gets lower. The channel mobility is around 360 cm²/V-s when the average interface microroughness is 0.2 nm, where the substrate impurity concentration is 4.5×10¹⁷ cm^-3, i.e. the electron bulk mobility is 400 cm²/V-s. It goes down to 100 cm²/V-s when the interface microroughness exceeds 1 nm     

The mechanism of metal conductivity over the interface between organic insulators

The hopping mobility of charge carriers (both at the surface and in the bulk) is analyzed theoretically in the presence of electron–hole pairs. A physical model is suggested for the metal conductivity over the interface between organic materials, each being an insulator by itself. The conductivity is due to the rather high surface density of geminate pairs formed at the interface. Conditions are established wherein the transitions of a significant portion of charge carriers between molecules do not require thermal activation or tunneling. The surface conductivity and mobility of charge carriers are estimated by numerical simulation.     

垂直电场作用下的钎锌矿相GaN电子输运特性的Monte Carlo研究

在GaN NMOSFET中,沟道电子由于受垂直于其运动方向电场的作用而产生界面散射,从而影响MOSFET特性.研究采用Monte Carlo体模拟方法计算钎锌矿相GaN材料在界面散射下的电子输运特性.模拟中在电子漂移方向加一个水平电场,同时在与其垂直的方向加另外一个电场,在垂直电场作用下,电子发生界面散射.采用基于指数...     

Ge (100) and (111) N- and P-FETs With High Mobility and Low- $T$ Mobility Characterization

In this paper, we demonstrate high-mobility bulk Ge N- and P-FETs with GeON gate dielectric. The highest electron mobility to date in Ge is reported, and two times improvement over universal hole mobility is achieved for Ge P-FETs. For the first time, the effect of surface orientation on Ge mobility is investigated experimentally. A 50% improvement in electron mobility is shown for the (111) substrate orientation compared to the (100) orientation. Carrier scattering mechanisms are studied through low-temperature mobility measurements and interface characterization. The conductance technique is applied at low temperatures for complete mapping of the density of interface traps $(D_{rm it})$ across the Ge bandgap and also close to the band edges. Carrier scattering mechanisms and the distribution of $D_{rm it}$ are compared for Ge NMOS and PMOS.      

Transport and Mobility Properties of Bulk Indium Nitride (InN) and a Two-Dimensional Electron Gas in an InGaN/GaN Quantum Well

We studied the transport and low-field mobility properties of bulk InN and a two-dimensional electron gas confined in an InGaN/GaN quantum well with regard to various parameters such as well width and interface roughness as a function of temperature. Since new material parameters for InN have been suggested by recent studies, the traditionally accepted and recently published parameter values for InN are used in our simulations and the results are compared. Mobility values in two and three dimensions are found from the steady-state drift velocities of carriers calculated using an ensemble Monte Carlo technique. Electron transport properties of bulk GaN and AlN are also presented and compared with bulk InN and InGaN/GaN quantum wells. The mobility of carriers in two dimensions is about 10,000 cm²/V s for low temperatures and in bulk InN increases significantly to a value of about 6,450 cm²/V s at room temperature when recently established material parameters are used.     

Accumulation-layer electron mobility in n-channel 4H-SiC MOSFETs

Accumulation-layer electron mobility in n-channel depletion-mode metal oxide semiconductor field effect transistors (MOSFETs) fabricated in 4H-SiC was investigated using Hall-measurements. The accumulation-layer mobility showed a smooth transition from the bulk value (~350 cm²/V-s) in the depletion regime into accumulation (~200 cm²/V-s). In contrast, the field-effect mobility, extracted from the transconductance, was found to be much lower (~27 cm²/V-s), due to the trapping of the field-induced carriers by interface states. Though the current in depletion/accumulation-mode MOSFETs can be high due to the contribution of bulk conduction resulting in low on-resistance, carrier trapping will cause the transconductance to be low in the accumulation regime     

Growth and characterization of indium arsenide thin films

The growth and characterization of indium arsenide films grown on indium phosphide substrates by the metal organic chemical vapor deposition (MOCVD) process is reported. Either ethyl dimethyl indium or trimethyl indium were found to be suitable in combination with arsine as source compounds. The highest electron mobilities were observed in films nucleated at reduced growth temperature. Scanning electron microscopy studies show that film nucleation at low temperature prevents thermal etch pits from forming on the InP surface before growth proceeds at an elevated temperature. Electron mobilities as high as 21,000 cm²V⁻¹ sec⁻¹ at 300 K were thus obtained for a film only 3.4 μm thick. This mobility is significantly higher than was previously observed in InAs films grown by MOCVD. From the depth dependence of transport properties, we find that in our films electrons are accumulated near the air interface of the film, presumably by positive ions in the native oxide. The mobility is limited by electrons scattering predominantly from ionized impurities at low temperature and from lattice vibrations and dislocations at high temperature. However, scattering from dislocations is greatly reduced in the surface accumulation layer due to screening by a high density of electrons. These dislocations arise from lattice mismatch and interface disorder at the film-substrate interface, preventing these films from obtaining mobility values of bulk indium arsenide.