低暗电流高温工作碲镉汞红外探测器制备技术

报道了与传统的n-on-p结构相比具有更低暗电流的p+-on-n型碲镉汞红外探测器的研究进展。通过水平滑舟富碲液相外延生长的方法在碲锌镉衬底上原位生长In掺杂碲镉汞n型吸收层材料,然后再分别采用As离子注入技术和富汞垂直液相外延技生长技术实现了P型As外掺杂的p+-on-n型平面型和双层异质结台面型两种结构的芯片制备。碲镉汞探测器的主要缺点是需要低温制冷,期望碲镉汞探测器在不降低性能的前提下具有更高的工作温度(High Operating Temperature,HOT),成为红外探测器技术发展的主要方向。本文对基于标准的n-on-p(Hg空位)掺杂工艺及新研制的p-on-n型As离子注入及异质结制备技术的探测器进行了高温性能测试,测试结果表明采用p-on-n型的碲镉汞探测器能够实现更高的工作温度。     

InAs/GaSb II类超晶格材料的Si离子注入研究

II类超晶格红外探测器一般通过台面结实现对红外辐射的探测,而通过离子注入实现横向PN结,一方面材料外延工艺简单,同时可以利用超晶格材料横向扩散长度远高于纵向的优势改善光生载流子的输运,且易于制作高密度平面型阵列。本文利用多种材料表征技术,研究了不同能量的Si离子注入以及退火前后对InAs/GaSb II类超晶格材料性能的影响。研究通过Si离子注入,外延材料由P型变为N型,超晶格材料中产生了垂直方向的拉伸应变,晶格常数变大,且失配度随着注入能量的增大而增大,注入前失配度为-0.012%,当注入能量到200 keV时,失配度达到0.072%,超晶格部分弛豫,弛豫程度为14%,而在300 °C 60 s退火后,超晶格恢复完全应变状态,且晶格常数变小,这种张应变是退火引起的Ga-In相互扩散以及Si替位导致的晶格收缩而造成的。     

Si,S,Be,Mg离子注入GaAs白光快速退火特性研究

利用灯光瞬态退火处理Si,S离子注入SI-GaAs样品,在950℃5秒的条件下得到了最佳的电特性,Be,Mg离子注入SI-GaAs样品在800℃ 5秒退火得到了最佳的电特性.Si,S,Be注入GaAs样品在适当的条件下得到了陡峭的载流子剖面分布,而Mg注入的样品有Mg的外扩散和较大的尾部扩散.透射电镜测量表明,Si低剂量和Be大剂量注入退火后单晶恢复良好,而Si和Mg大剂量注入退火后产生了大量的二次缺陷.应用Si和Mg注入GaAs分别制作了性能良好的MESFET和β=1000的GaAIAs/GaA,双极型晶体管(HBT).     

HgCdTe微台面红外焦平面技术研究

文章报导了采用液相外延(LPE)生长P型材料、B离子注入成结、全干法深台面刻蚀、深台面侧向钝化及电极引出技术制备出中波320 ×256HgCdTe微台面阵列结构,其相元中心距为30μm,截止波长为5. 0μm。     

同时模式的中波/长波碲镉汞双色红外探测器

采用光刻胶喷涂技术,突破了碲镉汞双色探测器加工的非平面离子注入和金属化开口等工艺.基于分子束外延(MBE)和原位掺杂技术生长的p3-p2-P1型碲镉汞(Hg1-xCdxTe)多层异质结材料,通过MW光电二极管n型注入区的开口刻蚀、非平面的MW/LW同步B+注入、台面侧向钝化和爬坡金属化,得到了同时模式的128×128面阵MW/LW双色探测器.在液氮温度下,MW/LW双色探测器两个波段的光电二极管截止波长λc分别为5.10μm和10.10μm,对应的峰值探测率Dλp*分别为2.02×1011cmHz1/2/W和3.10×1010cmHz1/2/W.通过对同时模式双色探测器材料与芯片结构的优化设计,HgCdTe双色探测器MW向LW、LW向MW的光谱串音分别抑制到了3.8%和4.4%.     

改用离子注入替代外延生产话筒管

结型场效应晶体管，长期来几乎都是采用外延扩散法工艺，随着微电子技术发展，半导体生产的离子注入设备及工艺相继推出，离子注入工艺越来越成熟。本文介绍了应用离子注入替代外延扩散制造话筒管的工艺概况。     

小型化锑化铟探测器制备

随着红外探测技术的不断发展,市场对红外探测器提出了越来越多的要求,如高分辨率、高工作稳定性、低成本、小型化等,红外探测器光敏芯片的制备技术随之向大面阵、小间距方向不断探索。基于市场需求,本文从技术发展的角度,研究采用离子注入技术、干法刻蚀技术制备台面结型焦平面阵列,实现高性能、窄间距、小型化光敏芯片的制备,为未来高分辨率芯片的制备奠定技术基础。文章介绍了128×128(15μm)、128×128(10μm)两款器件的制备,两款器件中测I-V性能良好,其中,128×128(15μm)器件杜瓦封装组件后性能表现良好。     

用二氧化硅钝化InGaAs/InP台面光电探测器

将台面和平面技术结合能够使InGaAs/InP探测器得到扩散掩蔽和随后的SiO_2膜钝化,且不会使暗电流恶化。100℃下初步寿命测试是令人鼓舞的。     

准平面型InAlAs/InGaAs异质结双极晶体管和单片集成激光器驱动电路

提出和制作了准平面型InAlAs/InGaAs异质结双极晶体管。该管主要采用硅离子注入法在半绝缘磷化铟衬底中形成隐埋型集电区以代替台面型集电区。晶体管的实测结果如下:h_(fe)=100,f_T=10GHz(V_(CE)=3V,I_c=10mA)。作为单片光电集成方面的实例,研制成功了由三个InGaAs/InAlAsHBT和一个电阻组成的激光器驱动电路,其电流调制速率高达4Gbit/s。     

特大电流高压硅功率晶体管制造技术

本文在讨论了特大电流高压晶体管面临的热应力和热击穿威胁的基础上,为克服一般平面和台面工艺在制作特大容量晶体管方面所存在的困难,把业已成熟的晶闸管与功率晶体管的制造技术结合起来,提出了一种三重扩散简易挖槽工艺技术,采用这种简易三重扩散挖槽     

双掺硅单晶及其P-N结研究

按照一定的掺杂比例制备了一种双掺硅单晶。单晶片经热处理后形成的P-N结具有结深浅、均匀、杂质浓度分布不同于扩散结和离子注入结等特点。本工作对P-N结形成的规律进行了理论和实验研究,结果十分吻合。对P-N结的基本特性和光学性能的研究说明:这种双掺硅形成的P-N结有可能用于制作光电器件、集成电路、太阳能电池和某些特殊器件。结果还有助于对硅表面反型的机构及界面问题的进一步认识。这项研究工作还提供了一种新的获取P-N结的工艺方法,这种方法在制造某些器件和集成电路时,工艺将大为简化。     

Ion-implanted In0.53Ga0.47As/In0.52Al0.48As lateral PNP transistors

Lateral PNP transistors have been realized for the first time in the (In,Ga)As/(In,Al)As heterostructure material system. Be ion implantation has been used to form the emitter and collector junctions. A current gain of 3.8 is obtained up to 200 µA of collector current for devices with a 1.5 µm electrical base width. A hole diffusion length of 2 µm in the (In,Ga)As is estimated.     

单片集成GaAs PIN/PHEMT光接收机前端工艺研究

利用0.5μm GaAs PHEMT技术研究了适用于单片集成GaAs PIN/PHEMT光接收机前端的关键工艺,解决了台面工艺和PHEMT平面工艺的兼容性问题,包括不同浓度磷酸系腐蚀液对台面腐蚀均匀性的影响、台面与平面共有金属化工艺对光刻技术的要求。结果表明,工艺技术完全满足单片设计要求,研制得到的单片集成光接收机前端在输入1Gb/s和2.5Gb/s非归零(NRZ)伪随机二进制序列(PRBS)调制的光信号下得到较为清晰的输出眼图。     

Fabrication of submicron junctions-proximity rapid thermaldiffusion of phosphorus, boron, and arsenic

Various techniques used in fabrication of deep submicron junctions are reviewed with respect to their advantages and disadvantages in silicon very large scale integration (VLSI) circuits technology. Proximity rapid thermal diffusion is then presented as an alternative process which results in very shallow junctions with high dopant concentrations at the surface. The feasibility of Si doping with B, P, and As for both planar and 3-D structures such as trench capacitors used in high density DRAM memories is shown based on sheet resistance measurements, secondary ion mass spectroscopy and scanning electron micrographs. Retardation effect of arsenic diffusion similar to the well known inhibition of silicon or SiO₂ deposition in chemical vapor deposition (CVD) processes is identified and discussed     

Enhanced arsenic diffusion and activation in HgCdTe

Temperature and time dependent Hg-annealing studies for arsenic activation have been carried out on As-doped molecular beam epitaxy HgCdTe eitherin situ or by ion implantation to determine the extent of arsenic activation in the single layer. Enhanced As diffusion and activation in double layer heterostructures have also been investigated to further our understanding of the effects on zero bias resistance-area product (R_oA) and quantum efficiency. The results show that the arsenic activation anneal is limited by Hg self-diffusion into the HgCdTe epilayer. Using this arsenic activation process for eitherin situ doped arsenic or implanted arsenic, high performance p-on-n double layer heterostructure photodiodes have been demonstrated on both mesa and planar device structures.     

GaInAs junction FET with InP buffer layer prepared by selective ion implantation of Be and rapid thermal annealing

GaInAs JFETs were fabricated on VPE-grown GaInAs layers. The pn junctions have been realised with Be ion implantation and rapid thermal annealing. The devices show a high transconductance of 130 mS/mm and an electron saturation velocity of 1.8 × 107 cm/s. Channel mobilities measured at the complete device are as high as 6800 cm2/Vs. These excellent device properties are due to the use of an undoped InP buffer layer which avoids the diffusion of Fe from the substrate into the active layer. The data were supported by S-parameter measurements which gave a frequency limit of 20 GHz for gate dimensions of 1.6 by 200 ?m2.     

Properties of Be-implanted planar GaAs p-n junctions

The fabrication and characteristics of planar junctions in GaAs formed by Be ion implantation are discussed. The critical processing step is shown to be the use of a carefully deposited oxygen-free Si/SUB 3/N/SUB 4/ encapsulation during post-implantation annealing. Forward and reverse characteristics are presented for Be-implanted junctions formed by encapsulating with SiO/SUB 2/, Si/SUB x/O/SUB y/N/SUB z/, or Si/SUB 3/N/SUB 4/ layers prior to annealing at 900/spl deg/C. Junctions which exhibit leakage current density of ~2/spl times/10/SUP -7/ A/cm/SUP 2/ at 80 V reverse bias and breakdown voltage >200 V have been fabricated using RF-plasma deposited Si/SUB 3/N/SUB 4/ layers as the encapsulant.     

Planar edge termination for 4H-silicon carbide devices

In this paper, it is demonstrated that the edge termination for 6H-SiC based upon self-aligned implantation of a neutral species on the edges of devices to form an amorphous layer can also be applied to 4H-SiC inspite of differences in their band structures. With this termination formed using argon implantation on Schottky barrier diodes, breakdown voltages were found to exceed those reported for mesa edge terminated diodes. Based upon this, it can be concluded that nearly ideal breakdown voltage is also achievable in 4H-SiC devices by using this planar edge termination     

Planar integration of a resonant-tunneling diode with pHEMT using anovel proton implantation technique

A novel technique of integrating resonant-tunneling diodes (RTDs) with pseudomorphic high-electron-mobility transistors (pHEMTs) is demonstrated. A proton was implanted through the pHEMT layers to convert the RTD structure underneath to a high-resistivity buffer without degrading the performance of the pHEMT. The cutoff frequency is 16 GHz for a 1.5-μm-gate-length pHEMT on such an implanted buffer. Substituting the conventional deep mesa etch with ion implantation maintains a highly planar surface. Such a monolithically integrated RTD/pHEMT oscillator is described     

点状PN结中的光电转换

用Ｎ型硅单晶材料制作了点状ＰＮ结光电二极管，对二极管的光电参数进行了测量。若依平面结的受光面积计算，在同样的光辐射下，点状ＰＮ结光岂二极管的光电流密度是常规面积光电二极管光电流密度的２００倍以上。分析表明，在光探测机制上不仅要考虑平面结范围内的光电转换，更要考虑平面结周边一个少数载流子扩散长度范围内的光电转换。利用点状ＰＮ结光照电流的测量，可以 确定在衬底材料光一少了的扩散长度。