应用于非破坏性读出铁电存储器的MFIS FET制备及其特性

将ZrO2和PZT的sol-gel薄膜制备技术应用到非破坏性读出铁电存储器中,制作出应用Al/PZT/ZrO2/p-Si结构的MFIS电容和单管MFIS FET,研究了MFIS电容的界面和存储窗口特性,结果表明ZrO2介质阻挡层和Si衬底以及PZT的附着良好,在±5V测试电压、1MHz测试频率下,存储窗口电压为2.6V左右,与相应的铁电薄膜的正、负矫顽电压差值的比为0.8.对于宽长比为500μm/50μm器件,采用栅极与源极、漏极写入方式,±10V时在写入电压下得到理想的输入-输出特性;小尺寸的40μm/8μm器件在±5V写入电压下特性较好.     

应用于非破坏性读出铁电存储器的MFIS FET制备及其特性

将ZrO2和PZT的sol-gel薄膜制备技术应用到非破坏性读出铁电存储器中,制作出应用Al/PZT/ZrO2/p-Si结构的MFIS电容和单管MFIS FET,研究了MFIS电容的界面和存储窗口特性,结果表明ZrO2介质阻挡层和Si衬底以及PZT的附着良好,在±5V测试电压、1MHz测试频率下,存储窗口电压为2.6V左右,与相应的铁电薄膜的正、负矫顽电压差值的比为0.8.对于宽长比为500μm/50μm器件,采用栅极与源极、漏极写入方式,±10V时在写入电压下得到理想的输入-输出特性;小尺寸的40μm/8μm器件在±5V写入电压下特性较好.     

MFIS结构的C-V特性

研究了运用SOL-GEL方法制备的Au/PZT(铅锆钛)/ZrO2/Si结构电容即MFIS(Metal/Ferroelectr c/Irsulator/Semiconductor)电容的方法,并对其进行了SEM、C-V特性测试及ZrO2介质层介电常数分析.研究了C-V存储窗口(Memory WindoW)电压与铁电薄膜和介质层厚度比的关系,得出MFIS电容结构中最佳铁电薄膜和介质层厚度比为7 10左右,在外加电压5V-+5V时存储窗口可达2.52V左右.     

MFIS结构的C-V特性

研究了运用SOL-GEL方法制备的Au/PZT(铅锆钛)/ZrO2/Si结构电容即 MFIS(Metal/Ferroelectric /Insulator/Semiconductor)电容的方法,并对其进行了SEM、C- V特性测试及ZrO2介质层介电常数分析 .研究了C-V存储窗口(Memory Window)电压与铁电薄膜和介质层厚度比的关系,得出MFIS电容结构中最佳铁电薄膜和介质层厚度比为7～10左右 ,在外加电压-5V～+5V时存储窗口可达2.52 V左右 .     

Au/PZT/p-Si结构铁电存储二极管的制备及其性能

采用准分子脉冲激光沉积 (PL D)工艺 ,制备了 Au/ PZT/ p- Si结构铁电存储二极管 .在氧气氛 35 0℃低温沉积、原位 5 30℃快速退火工艺条件下 ,获得了多晶纯钙钛矿结构的 Pb (Zr0 .5 2 Ti0 .48) O3(PZT)铁电薄膜 . PZT薄膜的铁电性能测试显示较饱和的、不对称的电滞回线 ,其剩余极化和矫顽场分别为 13μC/ cm2和 48k V/ cm.从C- V和 I- V特性曲线观察到源于铁电极化的回滞现象 ,记忆窗口约 1.1V,+4 V偏压下电流密度为 3.9× 10 - 6 A/cm2 .     

MFMIS铁电场效晶体管的制备及存储特性

在磁控溅射法制备Pb(Zr0.52Ti0.48)O3(PZT)铁电薄膜的基础上,结合半导体工艺制备了金属/铁电/金属/绝缘层/Si衬底(MFMIS)结构的铁电场效应晶体管。器件的顺时针电容-电压(C-V)特性曲线和逆时针漏电流-栅电压(Id-Vg)特性曲线表明,n沟道PZT铁电场效应晶体管具有明显的栅极化调制效应和极化存储性能,且在-5~ 5 V的电压下存储窗口为2 V。     

Au／PZT／p-Si结构铁电存储二极管的制备及其性能

采用准分子脉冲激光沉积(PLD)工艺,制备了Au／PZT／p-Si结构铁电存储二极管.在氧气氛350℃低温沉积、原位530℃快速退火工艺条件下,获得了多晶纯钙钛矿结构的Pb（Zr0.52Ti0.48）O3（PZT）铁电薄膜.PZT薄膜的铁电性能测试显示较饱和的、不对称的电滞回线,其剩余极化和矫顽场分别为13μC／cm2和48kV／cm.从C-V和I-V特性曲线观察到源于铁电极化的回滞现象,记忆窗口约1.1V,＋4V偏压下电流密度为3.9×10－6A／cm2.     

基于铁电薄膜的Al/PVDF/SiO2/n-Si结构的负电容效应研究

采用旋涂法制备了基于铁电聚合物薄膜的Al/PVDF/SiO_2/n-Si(MFIS)结构。通过测量MFIS结构的电容-频率特性和电容-电压特性,观察到负电容效应。测量频率越低,正向偏压越大,负电容效应越显著。在时域中,施加脉冲电压,出现瞬态电流随时间增大的电感现象。研究结果表明,MFIS结构中的负电容效应是一种电感现象。构建能带图分析MFIS结构中负电容效应的产生原因,是由于大量电子注入到界面中被捕获使得电流的相位落后于电压导致。基于铁电薄膜的负电容MFIS结构有望应用于低功耗器件中。     

Si衬底上具有Poly-Si/SiO2堆叠缓冲层的Pb (Zr0.52Ti0.48)O3 存储电容

在p型Si衬底上沉积多晶硅薄膜和Pb(Zr0.52Ti0.48)O3 (PZT)薄膜形成过渡层。测试淀积在多晶硅上的PZT薄膜不同退火温度的X射线衍射峰。Pt/PZT/poly-Si电容被研究。由于PZT薄膜的铁电极化特性,金属/铁电/多晶硅/二氧化硅/Si结构存储电容在650度退火展示了其顺时针的电压-电容曲线。存储窗口随着SiO2电容和PZT电容的耦合比的增加而增大。     

PZT铁电场效应晶体管电学性能

采用磁控溅射法制备了(111)向择优的Pb(Zr0.52Ti0.48)O3(PZT)铁电薄膜,并结合半导体集成技术制备了金属/铁电/金属/多晶硅/绝缘层/Si衬底(MFMIS)结构的n沟道铁电场效应晶体管.研究了铁电场效应晶体管的C-V特性、I-V特性以及写入速度.顺时针的C-V滞回曲线和逆时针的Id-Vg滞回曲线表明,n沟道PZT铁电场效应晶体管具有极化存储性能和明显的栅极化调制效应,并且在-5V到 5V的Vg电压下从C-V和Id-Vg滞回曲线中都得到了2V的存储窗口.     

Pb(Zr_(0.52)Ti_(0.48))O_3 memory capacitor on Si with a polycrystalline silicon/SiO_2 stacked buffer layer

Pb(Zr_(0.52)Ti_(0.48))O_3(PZT) thin films have been deposited on a p-type Si substrate separated by a polycrystalline silicon/SiO_2 stacked buffer layer.The X-ray diffraction peaks of the PZT thin films prepared on the polycrystalline silicon annealed at different temperatures were measured.In addition,the polarization of the Pt/PZT/polycrystalline silicon capacitor has been investigated.The memory capacitor of the metal/ferroelectric/polycrystalline silicon/SiO_2/semiconductor structure annealed at 650℃...     

High-performance Pt/SrBi/sub 2/Ta/sub 2/O/sub 9//HfO/sub 2//Si structure for nondestructive readout memory

Metal-ferroelectric-insulator-semiconductor (MFIS) capacitors with 390-nm-thick SrBi/sub 2/Ta/sub 2/O/sub 9/ (SBT) ferroelectric film and 8-nm-thick hafnium oxide (HfO/sub 2/) layer on silicon substrate have been fabricated and characterized. It is demonstrated for the first time that the MFIS stack exhibits a large memory window of around 1.08 V at an operation voltage of 3.5 V. Moreover, the MFIS memory structure suffers only 18% degradation in the memory window after 10/sup 9/ switching cycles. The excellent performance is attributed to the formation of well-crystallized SBT perovskite thin film on top of the HfO/sub 2/ buffer layer, as evidenced by the distinctive sharp peaks in X-ray diffraction (XRD) spectra. In addition to its relatively high /spl kappa/ value, HfO/sub 2/ also serves as a good seed layer for SBT crystallization, making the proposed Pt/SrBi/sub 2/Ta/sub 2/O/sub 9//HfO/sub 2//Si structure ideally suitable for low-voltage and high-performance ferroelectric memories.     

The effect of annealing temperature on the electrical properties of metal-ferroelectric (PbZr0.53Ti0.47O3)-insulator (ZrO2)-semiconductor (MFIS) thin-film capacitors

Metal-ferroelectric-insulator-semiconductor (MFIS) thin-film structures using PbZr_0.53Ti_0.47O₃ (PZT) as the ferroelectric layer and zirconium oxide (ZrO₂) as the insulator layer were fabricated in this work. The leakage current and the C-V memory window were measured for MFIS capacitors with the PZT layer annealed at temperatures of 400 °C, 500 °C, 600 °C, 700 °C. The dominant conduction mechanism of Al/PZT(290 nm)/ZrO₂(15 nm)/Si structure is Poole-Frenkel emission in the temperature range of 300-425 K. Under a sweep voltage of 6 V, the largest memory window of 1.31 V was obtained for 500 °C-annealed samples. The memory window as a function of insulator thickness was also discussed. More serious charge injection is observed when the voltage was swept from negative to positive.     

用于MFIS的ZrO_2薄膜的制备及特性研究

新型不挥发非破坏性读出铁电存储器金属 /铁电 /半导体器件结构中 ,存在着铁电薄膜与半导体衬底之间相互扩散、离子陷阱密度高、铁电薄膜难于直接淀积在硅衬底上、电荷注入等问题 ,因此在铁电薄膜与半导体之间增加一层合适的介质材料作为阻挡层是制备不挥发非破坏性读出铁电存储器的关键。文中研究了运用 SOL- GEL方法制备 Zr O2 介质层的方法 ,并且对制备的介质层的成份、结构、电特性进行了分析 ,为研制 MFIS作了准备。     

Electrical properties of metal-ferroelectric-insulator-semiconductor structure using BaxSr1−xTiO3 for ferroelectric-gate field effect transistor

Perovskite ferroelectric Ba_xSr_1−xTiO₃ (x = 0.5, 0.6, 0.7 and 0.8) thin films have been fabricated as metal-ferroelectric-insulator-semiconductor (MFIS) configurations using a sol-gel technique. The C-V characteristics for different Ba-Sr ratios and different film thicknesses have been measured in order to investigate the ferroelectric memory window effect. The results show that the memory window width increases with the increase both of Ba content and film thickness. This behavior is attributed to the grain size and dipole dynamics effect. It is found also that the memory window increases as the applied voltage increases. In addition, the leakage current density for the films is measured and it is found to be of the order of 10⁻⁸ A/cm² for all tested samples, indicating that the films have good insulating characteristics.     

Characteristics of metal-ferroelectric-insulator-semiconductor structure using Sr0.8Bi2.2Ta2O9 and Sr0.8Bi2.2Ta2O9-BaZrO3 for ferroelectric gates

Characteristics of BaZrO₃ (BZO) modified Sr_0.8Bi_2.2Ta₂O₉ (SBT) thin films fabricated by sol-gel method on HfO₂ coated Si substrates have been investigated in a metal-ferroelectric-insulator-semiconductor (MFIS) structure for potential use in a ferroelectric field effect transistor (FeFET) type memory. MFIS structures consisting of pure SBT and doped with 5 and 7 mol% BZO exhibited memory windows of 0.81, 0.82 and 0.95 V with gate voltage sweeps between −5 and +5 V, respectively. Leakage current density levels of 10⁻⁸ A/cm² for BZO doped SBT gate materials were observed and attributed to the metallic Bi on the surface as well as intrinsic defects and a porous film microstructure. The higher than expected leakage current is attributed to electron trapping/de-trapping, which reduces the data retention time and memory window. Further process improvements are expected to enhance the electronic properties of doped SBT for FeFET.     

Sol-Gel processing of Nb-doped Pb(Zr,Ti)O3 thin films for ferroelectric memory applications

The ferroelectric properties of Nb-doped PZT thin films prepared by a sol-gel method were evaluated relative to memory device application requirements. Within the range of 0 to 4 mol %, Nb-doping of PZT compositions near the morphotropic phase boundary region (i.e. PZT 53/47) enhanced overall ferroelectric properties by reducing the te-tragonal distortion of the unit cell. A 4 mol % Nb-doped PZT 53/47 thin film (0.26 μm) had a coercivity of 8 V/ μm, a remanence ratio of 0.54, a switchable polarization of 45 μC/cm², and a specific resistivity of 3 x 10⁹ Ω-cm. Nb-doping levels in excess of 5 mol had a detrimental effect on the resulting thin film ferroelectric properties. X-ray diffraction (XRD) analysis of highly doped films showed development of a significant PbO phase accompanied by diffraction line broadening of the perovskite phase. As such, it was postulated that the creation of excessive lead vacancies in the PNZT lattice resulted in PbO accumulation at the grain boundaries which impeded grain growth, and hence, adversely affected ferroelectric switching performance. The fatigue performance of the sol-gel derived thin film capacitor system was a function of switching voltage. At switching fields sufficient to saturate the polarization, the endurance of the thin film capacitor was greater than 10⁹ cycles. Cycling with lower fields reduced endurance values, but in all cases, the switchable polarization decreased linearly with the logarithm of cycles. Nb-doping did not have a significant effect on the fatigue performance.     

The characterization of retention properties of metal–ferroelectric (PbZr0.53Ti0.47O3)–insulator (Dy2O3, Y2O3)–semiconductor devices

Metal–ferroelectric–insulator–semiconductor (MFIS) capacitors and field effect transistors with the structures of Al/Pb (Zr_0.53, Ti_0.47) O₃ (PZT)/Dy₂O₃/Si and Al/PZT/Y₂O₃/Si were fabricated. The memory windows of Al/PZT/Dy₂O₃/Si and Al/PZT/Y₂O₃/Si capacitors with sweep voltage of 10 V are 1.03 V and 1.48 V, respectively. The effect of band offset on the memory window was discussed. The retention times of Al/PZT/Y₂O₃/Si and Al/PZT/Dy₂O₃/Si MFISFETs are 11.5 days and 11.1 h, respectively. The longer retention time of Al/PZT/Y₂O₃/Si field effect transistors is attributed to the larger conduction band offset at the Y₂O₃/Si interface (2.3 eV) compared to that of Dy₂O₃/Si (0.79 eV).     

Influence of La substitution on the electrical properties of metal-ferroelectric (BiFeO3)-insulator (CeO2)-semiconductor nonvolatile memory structures

Metal-multiferroic (La-substituted BiFeO₃)-insulator (CeO₂)-semiconductor (MFIS) capacitors has been fabricated. The crystalline phase and amount of La³⁺ substitution at Bi-site were investigated by XRD and XPS in the postannealing temperature range from 500 to 700 °C, respectively. The microstructure and interfacial layer between CeO₂ and Si substrate were characterized by HRTEM. The memory windows as functions of insulator film thickness and DC power for La were measured. The maximum memory window is about 1.9 V under ±6 V applied voltage. The ferroelectric polarization increases with increasing substitution amount. The morphologies of La-substituted BiFeO₃ films were also studied by AFM.