利用开关电容技术的50Hz抑制滤波器及其PSpice仿真研究

文中对 2 912PCM双信道滤波电路进行了讨论 ,应用开关电容电路技术 ,将其进行变换和必要的简化。设计了集成 5 0Hz抑制滤波器电路 ,运用LM 12 4运算放大器及开关电容时域宏模型 ,开关电容的时钟频率选为 12 8kHz进行计算机模拟 ,其结果与理论计算值一致     

基于MSP430F499的波形合成器

以MSP430F499为核心,主要由方波振荡电路、分频与滤波模块、移相电路、放大电路、加法器等组成。将方波振荡器的信号分频滤波产生不同频率的正弦波,经移相放大等处理后,分别根据方波三角波谐波组成关系,再合成方波和三角波。滤波模块对同一信号进行二次滤波,先用开关电容滤波器滤波,再经三阶巴特沃斯低通滤波器滤波,降低了高次谐波对信号的影响同时保证了通带内信号的平坦。可通过按键进行波形切换以及合成阶数切换,人机交互灵活,界面友好,操作简单。     

FilterCAD——开关电容滤波器的计算机辅助设计软件

<正> 在电子产品设计过程中,有时要用到开关电容滤波器进行滤波。由于开关电容滤波器涉及到半导体集成电路的工艺水平,因此,人们希望有一种类似于运算放大器的电路模块,外加几个电阻和电容,再加上时钟,就可以构成开关电容滤波器。本文所介绍的开关电容滤波器设计软件——FilterCAD,就可     

连续输出全集成开关电容带隙基准电路

本文提出了一种新型的开关电容带隙基准电路。电路采用双通道开关电容求和电路,能够连续输出基准电压,同时采用输出缓冲电路降低电压过冲,无需片外滤波电容。本设计采用NEC 0.35μm CMOS工艺,使用Hspice仿真软件对电路进行仿真。仿真结果表明:在典型参数情况下,该电路能够连续输出过冲为50μV的基准电压,在-20℃～80℃范围内,其输出电压的温度系数为15.4ppm/℃。     

基于CMOS开关电容技术的CAS解调电路设计

基于双二阶CMOS开关电容滤波器和隔离串联技术,应用抗混叠滤波技术和平滑滤波技术,采用UMC 0.5μm CMOS工艺实现了CAS解调电路的设计,并保证了解调的灵敏度。仿真和设计结果表明,该解调电路具有良好的稳定性和灵敏度,能应用于各种通信模拟解调集成电路设计。     

电力操作电源主电路参数设计

本文简单分析了2.2KW电力系统用直流操作电源移相全桥软开关拓扑结构,设计和选择了主电路的滤波电容和电感等元件,制作了软开关主电路的主要部件,包括高频变压器和谐振电感;根据设计的开关电源实际特点,选择了主功率管和次级整流二极管。     

整流滤波电容的设计与选用方法研究

整流滤波电路是直流稳压电源设备中常用电路,其中滤波电容的设计选取,直接影响到纹波电压的大小,关系到输出直流电压的质量。本文通过在设定条件下,依据整流滤波电路原理,阐述了纹波电压产生的过程,给出了一种滤波电容设计与选取计算方法,建立了电容选取的计算模型,描绘出了纹波电压、负载电阻与滤波电容之间关系曲线,并通过实验验证其科学性,有利于滤波电容的设计与选用。     

一种高性能高动态范围CMOS模拟开关

基于3V、0．34μm CMOS工艺技术，设计了一种提高信号幅度的自举模拟开关，其线性区的导通电阻约为0．5Ω；输入信号通过该开关后，动态范围达到满幅度，并能将O～3V的时钟电压提升到0～6V。该开关适用于A／D转换器中的采样／保持电路和开关电容的滤波电路。     

基于信号流图的开关电流滤波器设计

开关电流（SI）是有望取代开关电容（SC）的一种新型的取样数据技术，鉴于SC技术发展的成熟性及其与SI技术的紧密联系，即SC和SI滤波电路具有互易性，可采用信号流图转置的方法，将SC综合法直接用于SI滤波器设计，而无须提出新的设计方法。本文以二阶巴特沃思开关电容带通滤皮器为例给出了该方法的具体应用。     

DTMF接收器电路在数模混合测试系统和纯数字系统上的测试实现

一个完整的ＤＴＭＦ接收器电路集成了陷波（ｂａｎｄｓｐｌｉｔ）滤波器和数字编码功能。在滤波部分,高组滤波和拔号音频滤波等使用了开关电容技术。本文阐述了ＤＴＭＦ接收器电路在数模混合系统Ａ５４０和数字系统Ｔ３３１３上的不同测试技术的实现．     

An Efficient Adaptive Grouping for Single Code Assignment in WCDMA Mobile Networks

For achieving high utilization and efficient code management of the OVSF code tree in 3G WCDMA networks, several researches have extensively studied. Based on combining both the code assignment and the reassignment mechanisms, it increases obviously high utilization and reduces completely the code blocking. Nevertheless, the required rate of traffic should be powers of two of the basic rate, i.e. 1R, 2R, 4R, …, etc., which is impractical and results in wasting the system bandwidth while the required rate is not powers of two of the basic rate. Several multi-code assignment mechanisms have proposed to reduce the waste rate. Nevertheless, these methods bring two inevitable drawbacks including, high complexity of handling multiple codes, and increasing the cost of using more rake combiners at both the base stations and mobile nodes. Therefore, we propose an adaptive grouping code assignment herein to provide a single channelization code for any possible rate of traffic, even though the required rate is not powers of two of the basic rate. Based on the dynamic programming algorithm, the adaptive grouping approach forms several calls into a group. Then it allocates a subtree to the group and adaptively shares the subtree codes for these calls in the concept of time-sharing of slots during a group cycle time. Therefore, the waste rate and code blocking are thus reduced obviously while using a single rake combiner. Since the delay problem may be occurred in such a time-sharing approach, we propose two schemes of cycle interleaving methods to reduce delay. Numerical results indicate that the proposed adaptive grouping approach reduces significantly the waste rate and thus increases the system utilization. Moreover, the proposed cycle interleaving scheme reduces data delay significantly. Ren-Hung Hwang received his M.S. and Ph.D. degrees in computer science from University of Massachusetts, Amherst, Massachusetts, USA, in 1989 and 1993, respectively. He joined the Department of Computer Science and Information Engineering, National Chung Cheng University, Chia-Yi, Taiwan, in 1993, where he is now a full Professor and the Chair of the Department of Communication Engineering. His research interests include Internet QoS, peer-to-peer infrastructure design, and 3G QoS. Ben-Jye Chang received his M.S. degree in computer engineering from University of Massachusetts, Lowell, in 1991 and the Ph.D. degree in computer science and information engineering from National Chung-Cheng University, Taiwan, in 2001. He joined the Department of Computer Science and Information Engineering faculty at Chaoyang University of Technology, Taiwan, in 2002, where he is currently an Associate Professor. His research interests include QoS-based networks, QoS wirless networking, resource management for wireless networks and mobile cellular networks, and performance evaluation of networks. Min-Xiou Chen received the BS degree in computer science and information engineering from Tung Hai University, Tai-Chung, Taiwan, in 1996, and the MS and PhD degrees in computer science and information engineering from National Chung Cheng University, Chia-Yi, Taiwan, in 1998 and 2005, respectively. He is now an assistant professor at the Department of Computer Science and Information Engineering, Chung Hua University, Hsin-Chu, Taiwan. His research interests include wireless communication, SIP, sensor network and resource management in WCDMA systems. He is a member of the IEEE. Kun-Chan Tsai received the BS degree in information engineering and computer science from Feng Chia University, Taichung, Taiwan, in 2001, and the MS degree in computer science and information engineering from National Chung Cheng University, Chia-Yi, Taiwan, in 2003. His research interests include wireless communications and resource management in WCDMA systems.     

Supermedia-enhanced Internet-based telerobotics

This paper introduces new planning and control methods for supermedia-enhanced real-time telerobotic operations via the Internet. Supermedia is the collection of video, audio, haptic information, temperature, and other sensory feedback. However, when the communication medium used, such as the Internet, introduces random communication time delay, several challenges and difficulties arise. Most importantly, random communication delay causes instability, loss of transparency, and desynchronization in real-time closed-loop telerobotic systems. Due to the complexity and diversity of such systems, the first challenge is to develop a general and efficient modeling and analysis tool. This paper proposes the use of Petri net modeling to capture the concurrency and complexity of Internet-based teleoperation. Combined with the event-based planning and control method, it also provides an efficient analysis and design tool to study the stability, transparency, and synchronization of such systems. In addition, the concepts of event transparency and event synchronization are introduced and analyzed. This modeling and control method has been applied to the design of several supermedia-enhanced Internet-based telerobotic systems, including the bilateral control of mobile robots and mobile manipulators. These systems have been experimentally implemented in three sites test bed consisting of robotic laboratories in the USA, Hong Kong, and Japan. The experimental results have verified the theoretical development and further demonstrated the stability, event transparency, and event synchronization of the systems.     

云边协同中的资源调度优化

随着业务类型的丰富和多样化，低时延、高带宽、数据私密性、高可靠性等成为业务普遍的要求。边缘计算、雾计算、分布式云、算力网络等方案相继被提出，并在产学研各界引发了深度的研究和探索。针对“多级的算力分布以及算力的协同将是未来算力结构的主流”这一观点，产业内外达成了共识，算力管理、分配、调度等与资源优化相关的问题也成为当下的研究热点和重点攻关方向。为此，面向未来的算力供给结构，首先描述了学术界、产业界资源调度优化问题的最新进展，总结了当前的主要方法论和工程实施架构；然后，针对两种典型的云边协同场景，从场景拆分、调度目标、求解方案依次进行分析，给出了适应场景特性的资源调度优化参考方案。     

基于区块链技术的高校信息化建设研究

区块链技术具有去中心化、安全高效、不可篡改等特征,与高校信息化建设中的独立性和科学化要求相吻合。高校在信息化建设中,可借助区块链这一优势,对数据管理等工作进行有效管理,实现信息化建设目标。但在信息化建设中,高校显现出规章制度不完善、应用生态不成熟、监管机制不健全、法律法规不完善、区块链人才紧缺等问题,影响了高校信息化建设的革新进程。基于此,高校可从区块链技术的优势入手,从规章制度、生态体系、监管体系、法律法规、人才体系等方面探寻新的发展思路。     

星-地激光雷达联合观测合肥地区的气溶胶垂直分布

通过匹配星载CALIOP过境合肥时间,筛选Aerosol-lidar的观测数据,选取4个典型天气个例[沙尘天气、多云天气、中度污染(无云)、中度污染(有云)],对合肥地区的气溶胶进行联合观测,并对气溶胶的类型、气溶胶的变化、气溶胶污染的成因及来源进行分析。结果表明,多云天气下,星载激光雷达对底层气溶胶探测时会受到天气的影响,而地基激光雷达的探测效果较佳,可以通过定点连续观测距离的校正信号准确地反映气溶胶含量和变化特点。星-地激光雷达的联合观测可以更好地分析多种复杂天气的气溶胶变化。联合观测结果表明:轻度污染的沙尘型和受污染的浮尘型气溶胶主要集中在0.8~1.6 km高度范围内,退偏振比集中在0.18~0.20之间;多云天气的气溶胶主要为污染大陆型,集中在0.4~1.2 km高度范围内,其退偏振比在0.015~0.020之间,气溶胶含量很少且为具有球形粒子属性的细颗粒物;中度污染(无云)天气的气溶胶同时包含污染浮尘型和污染大陆型,主要集中在0.3~1.3 km高度范围内,退偏振比在0.08以下,具有明显的球形粒子属性;中度污染(有云)天气的气溶胶也同时包含污染浮尘型和污染大陆型,主要集中在0.8~1.4 km高度范围内,退偏振比在0.075~0.100范围内,为粒径较小的球形粒子。     

Service characterization for cost/benefit optimization of?enhanced?UMTS

In this paper an all-IP Enhanced-Universal Mobile Telecommunications System (E-UMTS) is considered, where enhancements include link level behavior, high-speed downlink packet access (HSDPA) channel, resource management, Diffserv architecture, and Radio Resource Management schemes. An overview of E-UMTS deployment scenarios and service needs is presented based on the views of relevant players. Deployment and mobility scenarios are considered, including expected population density and usage of service mix for three environments, namely offices, urban/vehicular, and business city center. In addition, based on population and service penetration values, E-UMTS traffic generation and activity models are described and characterized. Based on these scenarios and characterizations, system level simulations are carried out and the enhanced service quality performance is demonstrated, including blocking probability, handover failure probability and end-to-end delay in each deployment scenario. By using system level simulations, services and environmental conditions can be mapped into deployment strategies (and supported system capacity) whose evaluation is essential prior to field trials and real implementation. On the one hand, costs depend on the prices of the spectrum, equipment, operation and maintenance, as well as on the number of cells which, in turn, depends on the cell radius. On the other, revenues depend on the price per MB and on the supported throughput. As the goal of operators and service providers is to maximize the profit, the profit in percentage was obtained for the three considered scenarios. Its optimum values are found for cell radii around 31, 257, and 310 m for offices, vehicular and business city center scenarios, respectively.     

Surface-Bound Microgels for Separation,Sensing, and Biomedical Applications

This study presents a comprehensive survey of microgel-coated materials and their functional behavior, describing the complex interplay between the physicochemical and mechanical properties of the microgels and the chemical and morphological features of substrates. The cited literature is articulated in four main sections: i) properties of 2D and 3D substrates, ii) synthesis, modification, and characterization of the microgels, iii) deposition techniques and surface patterning, and iv) application of microgel-coated surfaces focusing on separations, sensing, and biomedical applications. Each section discusses – by way of principles and examples – how the various design parameters work in concert to deliver functionality to the composite systems. The case studies presented herein are viewed through a multi-scale lens. At the molecular level, the surface chemistry and the monomer make-up of the microgels endow responsiveness to environmental and artificial physical and chemical cues. At the micro-scale, the response effects shifts in size, mechanical, and optical properties, and affinity towards species in the surrounding liquid medium, ranging from small molecules to cells. These phenomena culminate at the macro-scale in measurable, reversible, and reproducible effects, aiming in a myriad of directions, from lab-scale to industrial applications.     

基于微件的井位部署论证系统实现

针对勘探、油藏井位部署过程中涉及的地理位置、勘探开发历程、油藏地质特征、产能状况等重要环节,对油田各级地质构造、三级储量、沉积相、井位等勘探开发图形对象叠加地形地貌在平面上进行多尺度、多层系的图形展示,并结合地质信息服务和企业数据服务,实现了探区内地震资料处理、解释一体化查询展示、已探邻井相关资料一体化研究、正钻井生产状况实时查询、区块内岩性、物性统计分析、油气储量分布情况展示、井位的在线编辑及成果标注等功能,有效支撑井位部署过程中的各种数据查询、在线踏勘、井位编辑,统计分析以及成果展示,从而提高油田井位部署的效率及水平。     

光刻与微纳制造技术的研究现状及展望

首先介绍了微纳制造的关键工艺技术——光刻技术。回顾了光刻技术的发展历程,介绍了各阶段主流光刻技术的基本原理和特点。阐述了国内外对光刻技术的研究现状,并讨论了光刻与微纳制造技术面临的挑战及其需要解决的关键性技术问题。然后重点介绍了浸没光刻、极紫外光刻、电子束光刻、离子束光刻、X射线光刻、纳米压印光刻等技术的概念、发展过程和特点,并对不同光刻技术的优缺点和生产适用条件进行了比较。最后结合国内外生产商、工程师和研究学者的研究成果,对光刻技术的未来发展做出展望。     

A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices

This paper extends the timing test model in [5] to be more realistic by including the effects of the test fixtures between a device under test and a tester. The paper enables analyzing the trade-offs that arise between the predicted yield and the required overall test environment timing accuracy (OTETA) which involves the tester overall timing accuracy (OTA) and the test fixtures' impacts. We specifically focus on the application of the extended model to predict the test yield of standard high-speed interconnects, such as PCI Express, Parallel/Serial RapidIO, and HyperTransport. The extended model reveals that achieving an actual yield of 80% with a test escape of 300 DPM (Defects Per Million) requires an equivalent OTETA that is about half the acceptable absolute limit of the tested parameter. Baosheng Wang received his B.S. degree from Beijing University of Aeronautics and Astronautics (BUAA), Beijing, P.R. China, in 1997 and M.S. degree from Precision Instrument & Mechanical Engineering from the Tsinghua University, Beijing, P. R. China in 2000. In 2005, he received his Ph.D. degree in Electrical Engineering from the University of British Columbia (UBC), Vancouver, BC, Canada. During his Master study, he was doing MEMS, Micro Sensors and Digital Signal processing. From 2000 to 2001, he worked in Beijing Gaohong Telecommunications Company as a hardware engineer in ATM technology. Currently, he is a Design-for-Test (DFT) engineer at ATI Technologies Inc., Markham, Ontario, Canada. He publishes widely at international conferences and journals. His primary research interests are time-driven or timing-oriented testing methodologies for System on-a-Chip (SoC). These fields include test time reduction for SRAMs, accelerated reliability test for non-volatile memories, yield analysis for SoC timing tests, SoC path delay timing characterization and embedded timing measurements. Andy Kuo is currently a Ph.D student of System on a Chip (SoC) Research Lab at the Department of Electrical and Computer Engineering, University of British Columbia. He received his M.A.Sc. and B.A.Sc in electrical and computer engineering from University of British Columbia and University of Toronto in 2004 and 2002 respectively. His research interests include high-speed signal integrity issues, jitter measurement, serial communications. Touraj Farahmand received the B.Sc. degree in Electrical Engineering from Esfahan University of Technology, Esfahan, Iran in 1989 and the M.Sc. in Control Engineering from Sharif university of Technology, Tehran, Iran in 1992. After graduation, he joined the Electrical and Computer Research center of Esfahan University of Technology where he was involved in the DSP algorithm development and design and implementation of the control and automation systems. Since October 2001, he has been working in the area of high-speed signal timing measurement at SoC (System-on-a-Chip) lab of UBC (University of British Columbia) as a research engineer. His research interests are signal processing, jitter measurement, serial communication and control. André Ivanov is Professor in the Department of Electrical and Computer Engineering, at the University of British Columbia. Prior to joining UBC in 1989, he received his B.Eng. (Hon.), M. Eng., and Ph.D. degrees in Electrical Engineering from McGill University. In 1995–96, he spent a sabbatical leave at PMC-Sierra, Vancouver, BC. He has held invited Professor positions at the University of Montpellier II, the University of Bordeaux I, and Edith Cowan University, in Perth, Australia. His primary research interests lie in the area of integrated circuit testing, design for testability and built-in self-test, for digital, analog and mixed-signal circuits, and systems on a chip (SoCs). He has published widely in these areas and holds several patents in IC design and test. Besides testing, Ivanov has interests in the design and design methodologies of large and complex integrated circuits and SoCs. Dr. Ivanov has served and continues to serve on numerous national and international steering, program, and/or organization committees in various capacities. Recently, he was the Program Chair of the 2002 VLSI Test Symposium (VTS'02) and the General Chair for VTS'03 and VTS'04. In 2001, Ivanov co-founded Vector 12, a semiconductor IP company. He has published over 100 papers in conference and journals and holds 4 US patents. Ivanov serves on the Editorial Board of the IEEE Design and Test Magazine, and Kluwer's Journal of Electronic Testing: Theory and Applications. Ivanov is currently the Chair of the IEEE Computer Society's Test Technology Technical Council (TTTC). He is a Golden Core Member of the IEEE Computer Society, a Senior Member of the IEEE, a Fellow of the British Columbia Advanced Systems Institute and a Professional Engineer of British Columbia. Yong Cho received the B.S. degree from Kyung Pook National Unviersity, Korea, in 1981 and the M.S. degree from in electrical and computer engineering from the University of South Carolina, Columbia, S.C., in 1988 and the Ph.D. degree in electrical engineering and applied physics from Case Western Reserve University, Cleveland, OH, in 1992. He is currently a Professor with the Department of Electronics Engineering, Konkuk University, Seoul, Korea. His recent research interests include SoC Design and Verification, H/W and S/W co-design, and embedded programming on SoC. Sassan Tabatabaei received his PHD in Electrical Engineering from the University of British Columbia, Vancouver, Canada in 2000. Since then, he has held several senior technical positions at Vector12 Corp, Guide Technology, and Virage Logic. His professional and research interests include mixed-signal design and test, and signal integrity and jitter test methodologies for high-speed circuits and multi-Gbps serial interfaces. He has published several papers and holds a US patent in the area of timing and jitter measurement. Currently, he holds the position of the director for embedded test at Virage Logic Corporation.