共查询到19条相似文献,搜索用时 93 毫秒
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提供了一种采用真空镀膜方式形成片式多层陶瓷电容器外电极的技术,一方面避开开发生产银、镍、铜等端电极浆料技术难题,同时减少对环境的污染,由于端电极是真空镀膜上去的,无须进行烧结,简化生产工艺,能够有效地降低片式多层陶瓷电容器的制造成本,提高产品竞争力. 相似文献
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射频MEMS压控电容器 总被引:1,自引:0,他引:1
研究了射频 MEMS压控电容器的设计和制造工艺。压控电容器的制作采用了 MEMS制造技术 ,其主要结构为硅衬底上制作金属传输线电极和介质层 ,然后制作金属膜桥作为电容器的另一个电极。通过改变加在金属膜桥与传输线间的电压达到改变电容值的目的。这种压控电容器可以工作于射频和微波波段 ,具有很高的Q值。测试结果如下 :在 1 GHz、0 V时 Q值达到 3 0 0 ,0偏压电容值为 0 .2 1 p F,当加上驱动电压后 Cmax/ Cmin的变比约为 4∶ 1 相似文献
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片式MLC三层端电极中的Sn-Pb合金电镀 总被引:1,自引:0,他引:1
片式MLC上涂烧T9410银浆。由瓦特型镀镍法得到镍阻挡层。通过加入稳定剂使氯化亚锡、酒石酸──碱式碳酸铅、乙二胺四乙酸钠──柠檬酸体系稳定,再加入醇类和胺类表面活性刘,在pH值5.0~6.0、温度27~35℃、电流密度0.3~0.7A/dm2条件下得到致密、均匀而白亮的镀层。在1206型片式MLC上经65min电镀,得到厚度约8μm的锡铅镀层,具有与锡铅焊料类似的金相结构,可焊性优良,在10N的拉力下5s不脱落。 相似文献
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AlF_3-MgF_2-SiO_2系低温共烧氧氟玻璃陶瓷性能研究 总被引:1,自引:1,他引:0
制备了AlF3-MgF2-SiO2系低温共烧氧氟玻璃陶瓷材料,用XRD、SEM和阻抗分析仪等分析其烧结特性、显微结构、介电性能以及与Ag电极浆料共烧等性能。结果表明:该材料可以在900℃烧结致密化,烧成后的样品具有低的介电常数(6.2)和介质损耗(<0.002)、较低的热膨胀系数(7.4×10–6/K)、较高的弯曲强度(220 MPa)和热导率[2.4 W/(m.K)],能够与Ag电极浆料共烧,是一种很有应用前景的低温共烧陶瓷基板和无源集成介质材料。 相似文献
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A GaAs MCM power amplifier has been developed for 1.9-GHz digital cordless telephones. Power-added efficiency of 40.2% and P1dB of 22.2 dBm have been obtained at drain supply voltage of 3.6 V. Adoption of the multilayer MCM structure, i.e., multilayer microwave integrated circuits (MuMIC), and on-chip ferroelectric capacitors successfully reduced the GaAs total chip area to be 1.1 mm2. We consider that the MuMIC is the most effective candidate for high frequency circuits 相似文献
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Evaluation of diffusion patterning as an alternative substratetechnology for automotive applications
Jie Xue Baker T.L. Klosowiak T. Molnar M. Pomeroy M. Weimer J. Bianco G. Mason R. 《Electronics Packaging Manufacturing, IEEE Transactions on》1999,22(1):16-22
In automotive applications, electronic circuits are becoming more sophisticated in terms of functionality, power, and density. Specifically, the engine control unit (ECU) is being moved to direct engine mounting, minimizing interconnection length, reducing interference, and simplifying assembly and testing. This type of mounting will reduce the overall manufacturing cost. Therefore, the electronics have to survive higher working temperatures, vibration, and wider temperature excursions during on/off and temperature cycles. These requirements have been the driving force for robust multilayer substrates. Diffusion patterning (DP), a multilayer dielectric technology developed by DuPont Electronics, is evaluated for next generation ECUs. This high density thick film technology achieves via formation through a complex chemical reaction utilizing an imaging paste. Moreover, the DP technology may incorporate buried resistors and capacitors. Using the DP technology, engine controllers with both four-layer and six-layer structures have been built. The six-layer substrate contains several buried resistors and capacitors. This paper discusses the critical parameters in fabrication of these substrates. The processibility and capacitance variations with different process parameters and firing conditions are also presented. Another aspect of DP technology is that it is compatible with surface mount and flip chip technology. Long term reliability testing of flip chips on DP substrates has been performed. After 4000 cycles, reliability data were excellent; no failures were identified. Reliability test results will be reviewed 相似文献
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高性能片式多层氧化锌压敏电阻器材料研究 总被引:2,自引:2,他引:0
对非Bi系氧化锌压敏电阻材料进行了系统研究。研究结果表明:在ZnO基体材料中,添加适量PbO、Co2O3、Cr2O3、MnO2、ZrO2、TiO2、Sb2O3 、B2O3等非Bi系添加剂,采用传统陶瓷制备工艺和合适烧结工艺,可获得a >50、IL<1 mA、烧结温度低于1 100℃的实用非Bi系氧化锌电阻瓷料。采用该瓷料,利用MLC工艺,选用Pd30/Ag70电极浆料,制作出V1mA<30 V、a >30、IL<1 mA的片式多层压敏电阻器。 相似文献