带有复合掺杂层集电区的InP/InGaAs/InP DHBT直流特性分析

设计了一种新结构InP/InGaAs/InP双异质结双极晶体管(DHBT),在集电区与基区之间插入n+-InP层,以降低集电结的导带势垒尖峰,克服电流阻挡效应.采用基于热场发射和连续性方程的发射透射模型,计算了n+-InP插入层掺杂浓度和厚度对InP/InGaAs/InP DHBT集电结导带有效势垒高度和I-V特性的影响.结果表明,当n+-InP插入层掺杂浓度为3×1019cm-3、厚度为3nm时,可以获得较好的器件特性.采用气态源分子束外延(GSMBE)技术成功地生长出InP/InGaAs/InP DHBT结构材料.器件研制结果表明,所设计的DHBT材料结构能有效降低集电结的导带势垒尖峰,显著改善器件的输出特性.     

带有复合掺杂层集电区的InP/InGaAs/InP DHBT直流特性分析

设计了一种新结构InP/InGaAs/InP双异质结双极晶体管(DHBT),在集电区与基区之间插入n -InP层,以降低集电结的导带势垒尖峰,克服电流阻挡效应.采用基于热场发射和连续性方程的发射透射模型,计算了n -InP插入层掺杂浓度和厚度对InP/InGaAs/InP DHBT集电结导带有效势垒高度和I-V特性的影响.结果表明,当n -InP插入层掺杂浓度为3×1019cm-3、厚度为3nm时,可以获得较好的器件特性.采用气态源分子束外延(GSMBE)技术成功地生长出InP/InGaAs/InP DHBT结构材料.器件研制结果表明,所设计的DHBT材料结构能有效降低集电结的导带势垒尖峰,显著改善器件的输出特性.     

fT=140GHz,fmax=200GHz的超高速InP DHBT

InP/InGaAs/InP DHBT具有频带宽、电流驱动能力强、线性好、相位噪声低和阈值电压一致性好等优点成为研究热点。通过优化外延材料结构设计和采用四元InGaAsP缓变层消除集电结电流阻塞效应;改进发射极-基极自对准工艺和集电区台面侧向腐蚀工艺,降低Rb和Cbc乘积;优化PI钝化工艺和空气桥互联等工艺,实现了发射极面积为2μm×10μm的自对准InP/InGaAs/InP DHBT器件,其直流增益β约为25,击穿电压BVCEO≥7 V@10μA,在VCE=4 V,Ic=10 mA下,截止频率fT=140 GHz,最高振荡频率fmax=200 GHz,优于同一外延片上的非自对准InP DHB器件,该器件将可应用于高速光通信和微波毫米波通信。     

InP/GaAsSb/InP双异质结双极晶体管技术发展现状(Ⅱ)

5 制作工艺和优化 Ⅱ型InP DHBT的工艺流程与传统Ⅰ型InP HBT和DHBT工艺基本相同,一般沿用传统的三台面工艺,所不同之处主要是基区材料不同而导致湿法腐蚀和工艺细节变化,此外,由于Ⅱ型DHBT集电区全部采用InP材料,从而减小了由于四元缓变层带来的形成集电区台面时的工艺难度.     

ft =203GHz的超高速InP/InGaAs双异质结晶体管

为了适应数字及模拟电路带宽的不断增加,我们在传统的台面结构基础上利用BCB钝化平坦化工艺技术,设计并研制了InP/InGaAs/InP双异质结双极型晶体管。我们研制的晶体管ft达到203GHz,是目前国内InP基DHBT的最高水平,发射极尺寸为1.0μm×20μm,电流增益β为166,击穿电压为4.34V,我们的器件采用了40nm高掺杂InGaAs基区,以及203nm含有InGaAsP复合式结构的集电区。该器件非常适合高速中功耗方面的应用。     

InP/InGaAs/InP双异质结双极晶体管技术研究

介绍了InP/InGaAs/InP双异质结双极晶体管(DHBT)材料生长、器件结构与设计、制作工艺和性能测试以及在振荡器中的应用等方面的研究.采用发射极-基极自对准工艺制作了InP/InGaAs/InP DHBT器件,发射极尺寸为1.5μm×10μm的器件小电流直流增益β约25,集电极-发射极击穿电压BVCEO≥10V,截止频率,ft和最高振荡频率,fmax分别为50和55GHz;     

InP/InGaAs/InP双异质结双极晶体管技术研究

介绍了InP/InGaAs/InP双异质结双极晶体管(DHBT)材料生长、器件结构与设计、制作工艺和性能测试以及在振荡器中的应用等方面的研究.采用发射极-基极自对准工艺制作了InP/InGaAs/InP DHBT器件,发射极尺寸为1.5μm×10μm的器件小电流直流增益β约25,集电极-发射极击穿电压BVCEO≥10V,截止频率,ft和最高振荡频率,fmax分别为50和55GHz;     

InP/GaAsSb/InP双异质结双极晶体管技术发展现状(Ⅰ)

InP/GaAsSb/InP双异质结双极晶体管(DHBT)以其独特的交错Ⅱ型能带结构,在频率特性、击穿特性和热特性等方面较传统的InP/InGaAsSHBT与InP/InGaAs/InPDHBT等显示出极大的优越性。对InP/GaAsSb/InPⅡ型DHBT技术的提出、外延层结构设计与生长、器件结构设计、器件制造工艺与优化以及国内外发展情况研究水平、发展趋势和商业化情况进行了系统的回顾和展望。指出结合垂直方向材料结构优化缩小器件尺寸和采用微空气桥隔离基极电极结构是InP/GaAsSb/InPDHBT向THz截止频率发展的最重要的技术路线。     

新结构InGaP/GaAs/InGaP DHBT生长及特性研究

设计并生长了一种新的InGaP/GaAs/InGaP DHBT结构材料,采用在基区和集电区之间插入n+-InGaP插入层结构,以解决InGaP/GaAs/InGaP DHBT集电结导带尖峰的电子阻挡效应问题。采用气态源分子束外延(GSMBE)技术,通过优化生长条件,获得了高质量外延材料,成功地生长出带有n+-InGaP插入层结构的GaAs基InGaP/GaAs/InGaP DHBT结构材料。采用常规的湿法腐蚀工艺,研制出发射极面积为100μm×100μm的新型结构InGaP/GaAs/InGaP DHBT器件。直流特性测试的结果表明,所设计的集电结带有n+-InGaP插入层的InGaP/GaAs/InGaP DHBT器件开启电压约为0.15V,反向击穿电压达到16V,与传统的单异质结InGaP/GaAs HBT相比,反向击穿电压提高了一倍,能够满足低损耗、较高功率器件与电路制作的要求。     

基于碳掺杂InGaAs材料的InP DHBT分子束外延生长研究

采用固态源分子束外延系统(SSMBE),以四溴化碳(CBr₄)作为碳掺杂源,研究基于碳掺杂InGaAs材料的InP双异质结双极晶体管(DHBT)分子束外延生长工艺。通过In原子补偿工艺,补偿基区InGaAs材料中被CBr₄刻蚀的In原子,调整In组分使InGaAs-C外延层与InP衬底晶格匹配。通过界面层Ⅴ族元素切换工艺,减少InP/InGaAs界面层四元合金材料的形成,避免四元合金界面对后续湿法工艺的影响,降低材料表面粗糙度。利用优化后的材料外延工艺,得到表面颗粒密度为15/cm²,基区InGaAs-C材料P型掺杂浓度为5.25×10¹⁹cm^-3,方阻非均匀性为0.5%的InP基DHBT完整结构材料,利用0.7μm InP DHBT工艺平台,得到增益为41、击穿电压为4 V、截止频率为341 GHz、最大震荡频率为333 GHz的InP基DHBT器件。     

High breakdown voltage InGaAs/InP double heterojunction bipolar transistors with fmax=256 GHz and BVCEO= 8.3 V

正An InGaAs/InP DHBT with an InGaAsP composite collector is designed and fabricated using triple mesa structural and planarization technology.All processes are on 3-inch wafers.The DHBT with an emitter area of 1 x 15μm~2 exhibits a current cutoff frequency f_t = 170 GHz and a maximum oscillation frequency f_(max) = 256 GHz.The breakdown voltage is 8.3 V,which is to our knowledge the highest BV_(CEO) ever reported for InGaAs/InP DHBTs in China with comparable high frequency performances.The high speed InGaAs/InP DHBTs with high breakdown voltage are promising for voltage-controlled oscillator and mixer applications at W band or even higher frequencies.     

High fmax InP double heterojunction bipolar transistorswith chirped InGaAs/InP superlattice base-collector junction grown byCBE

We report the performance of InP Double Heterojunction Bipolar Transistors (DHBT's) with a chirped InGaAs/InP superlattice B-C junction grown by CBE. The B-C junction of the DHBT was graded with a 10-period InGaAs/InP chirped superlattice (CSL) between the InGaAs base and the lightly doped InP collector. A highly doped thin layer was also included at the end of the CSL to offset the quasi-electric field arising from the grade and suppress further the carrier blocking effect across the B-C heterojunction. The InP/InGaAs CSL DHBT demonstrated a high BV_CEO of 18.3 V with a typical current gain of 55 with minimal carrier blocking up to high current densities. Maximum cutoff frequencies of f_max=146 GHz and f_r=71 GHz were obtained from the fabricated 2×10 μm²-emitter DHBT     

The growth of high quality InP/InGaAs/InGaAsP interfaces by CBE for SCH multi-quantum well lasers

Bulk InGaAsP and heterointerfaces of InP/InGaAs and InGaAsP/InGaAs have been grown by chemical beam epitaxy for use in multi-quantum well separate confinement heterostructure lasers. InGaAsP has been successfully grown for λ=1.1, 1.2 and 1.4 μm. The TMI and TEG incorporation coefficients have strong dependencies on substrate temperature and also charge as the InGaAsP composition tends towards InP. InP/InGaAs and InGaAsP/InGaAs quantum wells have been grown to determine the optimum gas switching sequence to minimize the measured photoluminescence FWHM. InGaAs quantum wells as narrow as 0.6 nm have been grown with 7K FWHM of 12.3 meV. Lattice matched MQW-SCH lasers were grown using different interface switching sequences with the best laser having a threshold current density of 792A/cm² for an 800 × 90 μm broad area device.     

InGaAsSb/InP Double Heterojunction Bipolar Transistors Grown by Solid-Source Molecular Beam Epitaxy

This letter investigates the dc characteristics of a double heterojunction bipolar transistor (DHBT) with a compressively strained InGaAsSb base, which is grown by solid-source molecular beam epitaxy. The novel InP/InGaAsSb HBT has a lower base/emitter (B/E) junction turn-on voltage, a lower offset voltage, and a junction ideality factor closer to unity than the conventional InP/InGaAs composite collector DHBT. These characteristics are attributed to the transistor's type-I B/E junction and type-II base/collector junction, which facilitates carrier transport for low power, high current density, and high-speed operation. Heterojunction bipolar transistors (HBTs), InP/InGaAsSb, molecular beam epitaxy (MBE).     

InGaAs/InP double-heterostructure bipolar transistors with near-ideal β versus ICcharacteristic

InGaAs/InP double-heterostructure bipolar transistors (DHBT's) with current gain β ∼ 630 have been realized using gas-source molecular beam epitaxy (GSMBE). These devices exhibit near-ideal β versus ICcharacteristic (i.e., β independent of IC) with a small-signal gainh_{fe} sim 180atI_{C} sim 2nA. In comparison, we findbeta sim I_{C}^{0.5}for a high-quality AlGaAs/GaAs HBT grown by OMCVD. The higher emitter injection efficiency at low collector current levels found in the InGaAs/InP DHBT is due to at least a factor 100 smaller surface recombination current.     

Wideband DHBTs using a graded carbon-doped InGaAs base

We report an InP/InGaAs/InP double heterojunction bipolar transistor (DHBT), fabricated using a mesa structure, exhibiting 282 GHz f/sub /spl tau// and 400 GHz f/sub max/. The DHBT employs a 30 nm InGaAs base with carbon doping graded from 8/spl middot/10/sup 19//cm/sup 3/ to 5/spl middot/10/sup 19//cm/sup 3/, an InP collector, and an InGaAs/InAlAs base-collector superlattice grade, with a total 217 nm collector depletion layer thickness. The low base sheet (580 /spl Omega/) and contact (<10 /spl Omega/-/spl mu/m/sup 2/) resistivities are in part responsible for the high f/sub max/ observed.     

Temperature dependent DC characteristics of an InP/InGaAs/InGaAsPHBT

We report the DC characteristics of n-p-n InP/InGaAs/InGaAsP HBT's which have a composite-collector structure designed to improve the breakdown and gain. The devices exhibit common-emitter current gain of greater than 8 for over 9 orders of magnitude of collector current and breakdown voltages greater than 10 V. The DC gain for a typical device decreases from 40 at room temperature to 8 at 90 K. Over the same temperature range the collector-current ideality factor increases from 1.04 to 1.46, and the base current ideality factor is 0.05 to 0.1 larger than these values. We suggest that the high collector-current ideality factor and the lower gain at the lower temperatures is due to the increasing importance of tunneling of current across the emitter-base junction. The devices with the InGaAs/InGaAsP composite-collector structure offer better common-base turn-on behavior than those with InGaAs/InP as the collector structure, without the breakdown behavior being compromised