一种200V/100A VDMOS器件开发

分析了功率MOSFET最大额定电流与导通电阻的关系,讨论了平面型中压大电流VDMOS器件设计中导通电阻、面积和开关损耗的折衷考虑,提出了圆弧形沟道布局以增大沟道宽度,以及栅氧下部分非沟道区域采用局域氧化技术以减小栅电容的方法,并据此设计了一种元胞结构。详细论述了器件制造过程中的关键工艺环节,包括栅氧化、光刻套准、多晶硅刻蚀、P阱推进等。流水所得VDMOS实测结果表明,该器件反向击穿特性良好,栅氧耐压达到本征击穿,阈值电压2.8V,导通电阻仅25mΩ,器件综合性能良好。     

超薄栅氧MOS器件传统关态栅泄漏电流研究

理论分析了MOSFET关态泄漏电流产生的物理机制,深入研究了栅氧化层厚度为1.4nm MOSFET传统关态下边缘直接隧穿栅泄漏现象.结果表明：边缘直接隧穿电流服从指数变化规律;传统关态下边缘直接隧穿对长沟道器件的影响大于短沟道器件;衬底反偏在一定程度上减小边缘直接隧穿泄漏电流.     

MOS AlGaN/GaN HEMT研制与特性分析

研制出在蓝宅石衬底上制作的MOS AIGaN/GaN HEMT.器件栅长1um,源漏间距4um,采用电子束蒸发4nm的Si02做栅介质.在4V栅压下器件饱和电流达到718mA/mm,最大跨导为172mS/mm,ft和fmax分别为8.1和15.3GHz.MOS HEMT栅反向泄漏电流与未做介质层的肖特基栅相比,在反偏10V时由2.1×10-8mA/mm减小到8.3×10-9mA/mm,栅漏电流减小2个数量级.MOS AIGaN/GaN HEMT采用薄的栅介质层,在保证减小栅泄漏电流的同时未引起器件跨导明显下降.     

MOS AlGaN/GaN HEMT研制与特性分析

研制出在蓝宅石衬底上制作的MOS AIGaN/GaN HEMT.器件栅长1um,源漏间距4um,采用电子束蒸发4nm的Si02做栅介质.在4V栅压下器件饱和电流达到718mA/mm,最大跨导为172mS/mm,ft和fmax分别为8.1和15.3GHz.MOS HEMT栅反向泄漏电流与未做介质层的肖特基栅相比,在反偏10V时由2.1×10-8mA/mm减小到8.3×10-9mA/mm,栅漏电流减小2个数量级.MOS AIGaN/GaN HEMT采用薄的栅介质层,在保证减小栅泄漏电流的同时未引起器件跨导明显下降.     

SiC VDMOS特性的影响因素分析

研究了材料、栅氧化层厚度和沟道长度对SiC VDMOS结构特性的影响.结果表明,4H-SiC器件具有更高的电流密度,因此,4H-SiC比6H-SiC更适合用于功率器件.对阈值电压和漏极电流的分析表明,在Vds＝ 0.1 V、Vgs＝15 V时,阈值电压随栅氧化层厚度的增大而线性增大,随沟道长度的增加而增大;而漏极电流密度则随栅氧化层厚度的增加而减小,随沟道长度的增加而减小.     

高性能A1GaN/GaN HEMT的肖特基特性

研究了AIGaN/GaN HEMT制备中相关工艺对器件肖特基特性的影响,并对工艺进行了优化.首先研究了表面处理对器件肖特基势垒特性的影响,对不同的表面处理方法进行了比较,发现采用氧等离子体处理,并用V(HF):V(H2O)=1:5溶液清洗刻蚀后的表面,可以有效减小表面态密度,未经处理的样品肖特基接触理想因子为2.6,处理后理想因子减小到1.8.对SiN钝化膜的折射率与肖特基特性的关系进行了研究,发现SiN钝化膜的折射率为2.3～2.4时,钝化对肖特基特性的影响较小,但反向泄漏电流较大.     

浅沟槽隔离对MOSFET电学特性的影响

随着工艺制程的不断进展,浅沟槽隔离技术(STI)成为深亚微米后的主流隔离技术。文章通过测试分析不同栅到有源区距离(SA)晶体管(MOSFET)器件的栅和衬底电流,分析了180 nm N沟道晶体管中STI对于栅和衬底电流的影响。结果表明栅电流随着SA的缩小呈现先缩小后增大的趋势,衬底电流在常温以及高温下都随着SA的减小而减小。文章用应力机制导致的迁移率以及载流子浓度的变化对栅和衬底电流的变化趋势进行了分析,通过改进伯克利短沟道绝缘栅场效应晶体管模型(BSIM)模拟了STI对衬底电流的影响,为设计人员进行低功耗设计提供了衬底电流模型。     

GaN HEMT栅工艺优化及性能提升

针对0.5 μm氮化镓高电子迁移率晶体管(GaN HEMT)自对准T型栅工艺,提出一种优化的解决方案。在感应耦合等离子体设备中引入两段法完成氮化硅栅足的干法刻蚀,其中,主刻蚀部分形成具备一定倾斜角度的氮化硅斜面,从而减小栅下沟道电场强度并提高栅金属对氮化硅槽填充的完整性;软着陆部分则以极低的偏置功率对氮化硅进行过刻蚀,确保完全清除氮化硅的同时尽量减小沟道损伤。通过器件优化前后各项特性的测试结果对比发现：优化后的器件关态击穿电压从140 V提升至200 V以上,3.5 GHz下输出功率密度从5.8 W/mm提升至8.7 W/mm,功率附加效率(PAE)从55.5%提升至66.7%。无偏置高加速应力试验96 h后,工艺优化后的器件外观无明显变化,最大电流变化<5%,表明器件可靠性良好。     

增强型AlGaN/GaN槽栅HEMT

成功研制出蓝宝石衬底的槽栅增强型AlGaN/GaN HEMT. 栅长1.2μm,源漏间距4μm,槽深15nm的器件在3V栅压下饱和电流达到332mA/mm,最大跨导为221mS/mm,阈值电压为0.57V, ft和fmax分别为5.2和9.3GHz. 比较刻蚀前后的肖特基I-V特性,证实了槽栅刻蚀过程中非有意淀积介质层的存在. 深入研究了增强型器件亚阈特性和频率特性.     

基于栅控二极管研究碲镉汞器件表面效应

采用不同工艺生长了CdTe/ZnS复合钝化层,制备了相应的长波HgCdTe栅控二极管器件并进行了不同条件下I-V测试分析.结果表明,标准工艺制备的器件界面存在较高面密度极性为正的固定电荷,在较高的反偏下形成较大的表面沟道漏电流,对器件性能具有重要的影响.通过钝化膜生长工艺的改进有效减小了器件界面固定电荷面密度,使HgCdTe表面从弱反型状态逐渐向平带状态转变,表面效应得到有效抑制,器件反向特性获得显著改善.此外,基于最优的工艺条件制备的器件界面态陷阱数量得到大幅降低,器件稳定性增强;同时器件R_0A随栅压未发生明显地变化.     

Effect of hydrogen etching and subsequent sacrificial thermal oxidation on morphology and composition of 4H-SiC surfaces

The effects of solvent cleaning, hydrogen etching, and additional oxidation treatment of 4H-SiC off-axis surfaces were investigated. The morphology of the resulting surfaces was observed by atomic force microscopy (AFM), and the chemical composition was studied by x-ray photoelectron spectroscopy (XPS). It is confirmed that simple cleaning and hydrofluoric acid (HF) etching procedures do not yield smooth surfaces, although the surfaces show mainly SiC-like bonds. High-temperature hydrogen etching can effectively remove polishing scratches, leading to a very smooth morphology, but it leaves some residual graphitic-bound carbon behind. It is shown that a subsequent oxidation step not only removes residual graphite on the hydrogen-etched surface but also produces the same chemical composition on all treated surfaces.     

基于SiO2掩膜层的硅基微半球谐振子模具加工工艺

微半球模具的三维对称性对半球谐振子的性能有着决定性的影响。提出使用热氧化工艺生长的SiO2材料作为掩膜层,以达到在使用HNA腐蚀溶液制作微半球陀螺谐振子模具的过程中加快纵向腐蚀速率及实现半球模具三维对称的目的。详细研究了不同腐蚀窗初始半径下HNA腐蚀溶液对〈111〉单晶硅进行纵向和侧向腐蚀时,其腐蚀深度和腐蚀速率的演化规律,并在此基础上通过设置适当的腐蚀窗初始半径(5μm)以及腐蚀时间(15 min),成功制作出了半径为38.937 7μm的三维对称半球谐振子模具,通过球度拟合证明该模具整体半径方差为0.789 3μm,球度偏差为2%,为半球谐振子三维对称性的提升奠定了基础。     

Etching characteristics of Si using surface discharge plasma under Ar/CF4 and He/CF4 conditions

A maskless etching technique that is useful for manufacturing solar cells and microelectronics was examined using surface discharge plasma operated at atmospheric pressure. In this study, in order to investigate the obvious etching characteristics of Si using surface discharge plasma, we observed the grooves obtained by etching Si substrates under He/CF₄ and Ar/CF₄ conditions. The etching rate using Ar was faster than when using He. Further, the choice of gas was found to influence the direction along which etching progressed. Based on the results, the characteristics and mechanisms of Si etching were discussed.     

MEMS THz滤波器的制作工艺

基于MEMS技术制作了太赫兹(THz)滤波器样品,研究了制作滤波器的工艺流程方案,其关键工艺技术包括硅深槽刻蚀技术、深槽结构的表面金属化技术、阳极键合和金-硅共晶键合技术。采用4μm的热氧化硅层作刻蚀掩膜,成功完成了800μm的深槽硅干法刻蚀;采用基片倾斜放置、多次离子束溅射和电镀加厚的方法完成了深槽结构的表面金属化,内部金属层厚度为3~5μm;用硅-玻璃阳极键合技术和金-硅共晶键合技术实现了三层结构、四面封闭的波导滤波器样品加工。测试结果表明,研制的滤波器样品中心频率138GHz,带宽15GHz,插损小于3dB。     

Influence of different SiC surface treatments performed prior to Ni ohmic contacts formation

This work is dealing with the influence of surface treatment on ohmic contacts to hexagonal N-type SiC with medium doping level. The contact materials were Ni and Ni₂Si. The structures had to be annealed at high temperatures in order to reach ohmic behavior. A number of surface treatment methods were tested: wet cleaning, plasma etching, intentional oxidation with etching, H₂ annealing and their combinations. After some types of cleaning, the SiC surface was immediately analysed using the XPS method. The results of the analyses showed that the composition of the surface was not much influenced by these treatments. At lower annealing temperatures (approx. up to 850 °C) the prepared contacts showed Schottky behavior with large scatter of parameters. After annealing at approx. 960 °C, where the onset of ohmic behavior is expected, the structures were truly ohmic and of good parameters. Cleaning methods had just a negligible influence on the electrical parameters of the ohmic contacts. An explanation for these observed facts is suggested: Although - already on the basis of the XPS results - we could speak about a negligible influence of the cleaning onto the contact parameters, there might come across also other mechanisms coming from interaction of contact materials with SiC, which caused similar behavior of ohmic contacts on differently treated surfaces.     

采用CHF_3和O_2等离子体刻蚀PI的各向异性研究

研究了一种有效刻蚀聚酰亚胺(PI)的干法刻蚀方法,以金属铬为掩膜,刻蚀经涂胶并亚胺化而得到具有一定厚度的PI薄膜。利用反应离子刻蚀设备(RIE)将O2和CHF3按一定比例混合,适当调节刻蚀压力、气体比例、功率、时间等因素,可以得到侧壁和底面光洁、具有不同表面形貌的刻蚀结构。借助台阶仪和显微测量工具测定刻蚀样片,进一步得到不同工艺参数下刻蚀深宽比,并通过分析得出其他因素对PI刻蚀深宽比的影响趋势。该项研究避免了"微掩膜"效应所产生的表面粗糙问题,同时优化了刻蚀工艺,得到各向异性刻蚀的具体工艺参数,为PI不同应用目的选择刻蚀工艺提供了理论依据。     

Influence of voltage on photo-electrochemical etching of n-type macroporous silicon arrays

The influence of voltage on photo-electrochemical etching(PEC) of macroporous silicon arrays(MSA) was researched.According to the theory of the space charge region,I-V scan curves and the reaction mechanism of the n-type silicon anodic oxidation in HF solution under different current densities,the pore morphology influenced by the working voltage were studied and analyzed in detail.The results show that increasing the etching voltage will lead to distortion of the pore morphology,decreasing etching volta...     

Impact of recess-etching-assisting resist-openings on the shapes ofgate grooves for short gate length InAlAs/InGaAs heterojunction FET's

When resist openings are employed to monitor the drain current of InAlAs/InGaAs-heterojunction-based FET's during wet-chemical gate recess, etching rates for InGaAs and InAlAs can be significantly modified by the exposure of the surface metal on the nonalloyed ohmic electrodes to citric-acid-based etchants. Surface metal of Ni enhances the recess etching rate to a degree that is much higher than that in its absence. With nonselective citric acid-based etchant, the presence of Pt surface metal, however, leads to a preferential etching of InGaAs over InAlAs. This behavior of selective etching is attributed to the excess oxidation of InAlAs induced by the high electrode potential of Pt via electrochemical effects. This investigation discloses that the selection of the surface metal that lies beneath the resist openings can be very important if gate recess grooves with desired shapes are to be fabricated     

衬底表面状态对碲镉汞薄膜表面起伏的影响

通过改变碲锌镉衬底的表面加工方法及溴-甲醇腐蚀液的浓度,研究衬底的表面状态对碲镉汞薄膜表面起伏情况的影响。利用傅里叶红外透射(FTIR)光谱议、晶片扫描成像系统、光学显微镜等工具对不同条件下的碲镉汞薄膜的表面起伏情况进行观察和比较。研究初步发现碲锌镉衬底不经过化学抛光,以及不经过腐蚀直接进行外延的情况下得到的碲镉汞薄膜的表面起伏状况会得到一定程度的改善,但是考虑溴-甲醇腐蚀液对机械抛光造成的表面应力的释放作用以及外延过程中的衬底回熔的相互作用会使得外延所得碲镉汞薄膜表面起伏情况更加复杂。因此,仍需要对衬底使用前的化学抛光对薄膜表面起伏的作用以及确定合适的溴-甲醇腐蚀液的浓度进行进一步的研究。     

热氧化方法改善硅干法刻蚀波导的表面粗糙度

提出了一种热氧化的方法来改善干法刻蚀硅波导的表面质量.通过Suprem二维工艺模拟程序对氧化过程的物理模型进行了分析.用实验证实了该方法的可行性并与模拟结果进行了比较.实验中将硅波导的表面粗糙度由65.4nm降低到了8.8nm.另外讨论了分次氧化方法的利弊