共查询到19条相似文献,搜索用时 94 毫秒
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设计了一款应用于双电源系统中的电荷泵电路结构,通过内部电平转化与控制电路,在双电源系统中实现不同逻辑电平控制产生高压的目的,为EEPROM存储单元提供擦写所需高压.电路采用ZMOS管作为传输管,提高传输效率;在电荷泵不工作时,所有子电路关闭,实现零功耗设计.仿真结果显示,电路输出电压精度高、上电速度快、驱动能力强.电路采用SMIC 0.18μm CMOS工艺流片,已实际应用于数字电位计芯片设计中,输出高压稳定,达到设计要求,性能良好. 相似文献
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设计了一款应用于低电源电压EEPROM的双电荷泵电路结构,提供存储单元编程所需的高压。基于传统Dickson结构,设计主次两级电荷泵结构:次级电荷泵为两级升压结构,输出电压可增强时钟的驱动能力、抬高其高电平;主级电荷泵采用传输管栅压提升的结构及驱动能力增强的时钟对内部电容进行充放电,提高主级电荷泵每级的传输能力及整体电路的工作效率,最终实现低电源电压下产生高压的目的。同时,通过使能时序控制稳压系统电路,保证了输出电压的稳定性。仿真结果显示,电荷泵升降压速度快、纹波小、效率高。该双电荷泵电路已实际应用于芯片设计中,采用0.18μm EEPROM工艺流片,输出高压稳定,达到设计要求,并且性能良好。 相似文献
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一种高效率的适合于低功耗应用的电荷泵电路 总被引:1,自引:1,他引:0
设计实现了一种高效率的电荷泵电路。利用电容和晶体管对电荷传输开关进行偏置来消除开关管阈值电压的影响。同时,通过对开关管的的衬底进行动态的偏置使得在电荷传输期间当开关管打开时其阈值电压较低,在开关管关断时其阈值电压较高。该电荷泵电路的效率得到了提高。基于0.18μm,3.3V标准CMOS工艺实现了该电路。在每级电容为0.5pF,时钟频率为780KHz,电源电压为2V的情况下,测得的8级电荷泵的输出电压为9.8V。电荷泵电路和时钟驱动电路从电源处总共消耗了2.9μA的电流。该电荷泵电路适合于低功耗的应用。 相似文献
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《固体电子学研究与进展》2017,(4)
设计了一款应用于flash存储单元编程操作的高压双电荷泵电路系统,可同时提供正负高压。该系统基于传统的Dickson结构,采用提高传输管栅压的方法进行改进设计,降低电压传输损失,提高工作效率。同时,通过使能时序的控制,保证电路系统的稳定性;通过基准与分压电路的应用,保证输出电压的高精确度。仿真结果显示,该电路输出电压精度高、纹波小、效率高,已实际应用于芯片设计中,采用SMIC 0.18μm flash工艺流片,输出正负高压稳定,达到设计要求,性能良好。 相似文献
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The current paper presents a new inverter-based charge pump circuit with high conversion ratio and high power efficiency. The proposed charge pump, which consists of a PMOS pass transistor, inverter-based switching transistors, and capacitors, can improve output voltage and conversion ratio of the circuit. The proposed charge pump was fabricated with TSMC 0.35 μm 2P4M CMOS technology. The chip area without pads is only 0.87 mm×0.65 mm. The measured results show that the output voltage of the four-stage charge pump circuit with 1.8 V power supply voltage (VDD=1.8 V) can be pumped up to 8.2 V. The proposed charge pump circuit achieves efficiency of 60% at 80 μA. 相似文献
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For 3D vertical NAND flash memory, the charge pump output load is much larger than that of the planar NAND, resulting in the performance degradation of the conventional Dickson charge pump. Therefore, a novel all PMOS charge pump with high voltage boosting efficiency, large driving capability and high power efficiency for 3D V-NAND has been proposed. In this circuit, the Pelliconi structure is used to enhance the driving capability, two auxiliary substrate bias PMOS transistors are added to mitigate the body effect, and the degradation of the output voltage and boost efficiency caused by the threshold voltage drop is eliminated by dynamic gate control structure. Simulated results show that the proposed charge pump circuit can achieve the maximum boost efficiency of 86% and power efficiency of 50%. The output voltage of the proposed 9 stages charge pump can exceed 2 V under 2 MHz clock frequency in 2X nm 3D V-NAND technology. Our results provide guidance for the peripheral circuit design of high density 3D V-NAND integration. 相似文献
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Dynamics of the Dickson charge pump circuit are analyzed. The analytical results enable the estimation of the rise time of the output voltage and that of the power consumption during boosting. By using this analysis, the optimum number of stages to minimize the rise time has been estimated as 1.4 Nmin, where Nmin is the minimum value of the number of stages necessary for a given parameter set of supply voltage, threshold voltage of transfer diodes, and boosted voltage. Moreover, the self-load capacitance of the charge pump, which should be charged up at the same time as the output load capacitance of the charge pump, has been estimated as about one-third of the total charge pump capacitance. As a result, the equivalent circuit of the charge pump has been modified. The analytical results are in good agreement with simulation by the iteration method, typically within 10% for the rise time and within 2% for the power consumption. In the case of a charge pump with MOS transfer transistors, the analytical results of the rise time agree with the SPICE simulation within 10% 相似文献
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提出了一种新颖的双模式高集成开关电容电荷泵。该电荷泵集成高频振荡器、电平移位、逻辑驱动以及4个功率MOSFET开关。与传统电荷泵相比,该电路可以工作在单电源以及双电源两种模式。单电源模式下,输出电压为-VCC;双电源模式下,输出电压为-3×VCC。电路采用0.35μm BCD工艺实现。测试结果表明:室温时,单电源模式和双电源模式下电荷泵输出电流分别为36 mA和80 mA时输出电压分别为-3.07 V和-12.10 V。在-55℃到125℃温度范围内,单电源模式和双电源模式下电荷泵输出电流分别为24 mA和50 mA时输出电压分别低于-3.06 V和-12.35 V。该电荷泵在两种模式下工作特性良好,已应用于相关工程项目。 相似文献
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针对使用标准CMOS技术实现的传统电荷泵输出电压较低的不足,文中提出将基本的电荷转移开关进行改进的MOS电荷泵,在泵送增益增加电路的基础上,通过在泵的输出级增加第3个控制信号来提高电荷泵的电压增益,以得到更高的输出电压,将其作为无线传感器的能量收集电路。仿真结果表明,该改进型电荷泵电路适合于低电压设备,并具有较高的泵送增益。其输出电压在同类电荷泵中最高,在1.5 V电源条件下,可高达8.5 V。 相似文献
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实现了一种新型恒压输出电荷泵电路,通过选择合理的电荷泵结构能有效抑制反向电流及衬底电流,并通过一种负反馈稳压电路得到低纹波且不随电源电压变化的稳压输出,非常适用于MEMS麦克风。该电路采用MIXIC0.35μm标准CMOS工艺实现,测试结果表明该电路能自适应2.8~3.6V的电源电压变化,输出稳定的9V直流电压。 相似文献
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Ilias Pappas Stilianos Siskos Charalabos A. Dimitriadis 《Electron Devices, IEEE Transactions on》2007,54(2):219-224
In this paper, a new source-follower-type analog buffer for active-matrix displays, designed by using low-temperature polysilicon thin-film transistors (TFTs), is proposed. The buffer, consisting of five n-type polysilicon TFTs, one bias voltage, and an additional control signal, exhibits high immunity to threshold voltage and mobility variations. The functionality of the proposed buffer was verified by HSPICE simulations. In order to obtain realistic simulations, the TFT model parameters used for the simulations were extracted from fabricated TFTs using the Silvaco tools (ATLAS). The proposed buffer has 7-bit output voltage with the dynamic output voltage range of 7.5 V ranging from 2.5 to 10 V and with resolution up to 0.03 V 相似文献
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由于存在逆向电流,利用电流传输开关特性的改进型的电压泵(NCP-1)的电压增益被大大减弱.本论文提供了一个新的方法.通过使用双阈值电压CMOS代替单阈值电压CMOS,不但消除了逆向电流,而且对低电压有很好的放大增益.PSPICE模拟结果,当电源电压为0.5V时,6级电压泵可使输出电压放大到2.68V. 相似文献