Low voltage copper phthalocyanine organic thin film transistors with a polymer layer as the gate insulator

Low voltage organic thin film transistors(OTFTs) were created using polymethyl-methacrylate-co g-lyciclyl-methacrylate(PMMA-GMA) as the gate dielectric.The OTFTs performed acceptably at supply voltages of about 10 V.From a densely packed copolymer brush,a leakage current as low as 2×10~(-8) A/cm~2 was obtained.From the measured capacitance-insulator frequency characteristics,a dielectric constant in the range 3.9-5.0 was obtained. By controlling the thickness of the gate dielectric,the threshold voltage ...     

钠β－氧化铝作为AlGaN/GaN MISHEMT栅绝缘层及表面钝化层时的器件性能

An AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistor(MISHEMT), with sodium beta-alumina(SBA) for both gate insulation and surface passivation, was investigated and compared with a conventional metal-semiconductor high-electron-mobility transistor(MESHEMT). The measured gate leakage current of the MISHEMT was reduced by approximately one order of magnitude as compared with that of the conventional MESHEMT. The saturation drain current of the AlGaN/GaN MISHEMT reached 830 mA/mm, which was about 43% higher than that of a conventional MESHEMT. The peak extrinsic transconductance of the MISHEMT was 103 mS/mm, which was similarly higher than that of the MESHEMT. The results suggested that the SBA thin film is an effective candidate gate dielectric for AlGaN/GaN MISHEMTs.     

适用于双金属栅集成的TaN湿法腐蚀

Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O3/H2O and NH4OH/H2O2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO3/H2O solution due to HF being included in HF/HNO3/H2O, and the fact that TaN is difficult to etch in the NH4OH/H2O2 solution at the first stage due to the thin TaOxNy layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO3/H2O solution first and the NH4OH/H2O2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and Jg-Vg characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.     

金刚石 MISFET 器件的研究

Based on the hydrogen-terminated surface channel diamond material,a 1μm gate length diamond metal-insulator-semiconductor field-effect transistor（MISFET） was fabricated.The gate dielectric Al₂O₃ was formed by naturally oxidated thin Al metal layer,and a less than 2 pA gate leakage current was obtained at gate bias between -4 V and 4 V.The DC characteristic of the diamond MISFET showed a drain-current density of 80 mA/mm at drain voltage of -5 V,and a maximum transconductance of 22 mS/mm at gate-source voltage of -3 V.With the small signal measurement,a current gain cutoff frequency of 2.1 GHz was also obtained.     

Influence of La-Mn-AI Co-Doping on Dielectric Properties and Structure of BST Thick Film

A new sol-gel process is applied to fabricate the BST （BaxSr1-xTiO3） sol and nano-powder of La-Mn-Al co-doping with Ba/Sr ratio 65/35, and the BST thick film is prepared in the Pt/Ti/SiO2/Si substrate. The powder and thick film are characterized by X-ray diffraction and transmission electron microscope. The influence of La-Mn-Al co-doping on the dielectric properties and micro-structure of BST thick film is analyzed. The results show that the La, Mn, and Al ions can take an obvious restraint on the growth of BaSrTiO3 grains. The polycrystalline particles come into being during the crystallization of thick film, which may improve the uniformity and compactness of thick film. The influence of unequal-valence and doping amount on the leakage current, dielectric loss, and dielectric property are mainly discussed. The dielectric constant and dielectric loss of thick film are 1200 and 0.03, respectively, in the case of 1mol% La doping, 2mol% Mn doping, and 1mol% Al doping.     

Photoconductive properties of organic-inorganic Ag/p-CuPc/n-GaAs/Ag cell

A thin film of copper phthalocyanine(CuPc),a p-type semiconductor,was deposited by thermal evaporation in vacuum on an n-type gallium arsenide(GaAs) single-crystal semiconductor substrate.Then semitransparent Ag thin film was deposited onto the CuPc film also by thermal evaporation to fabricate the Ag/p-CuPc /n-GaAs/Ag cell.Photoconduction of the cell was measured in photoresistive and photodiode modes of operation. It was observed that with an increase in illumination,the photoresistance decreased in reverse bias while it increased in forward bias.The photocurrent was increased in reverse bias operation.In forward bias operation with an increase in illumination,the photocurrent showed a different behavior depending on the voltage applied.     

Thin film AlGaInP light emitting diodes with different reflectors

The reflectivity versus incident angle of a GaP/Au reflector,a GaP/SiO_2/Au triple ODR(omni-directional reflector) and a GaP/ITO/Au triple ODR was calculated.Compared to AlGaInP LEDs with a GaAs absorbing substrate, thin film LEDs with a Au reflector,a SiO_2 ODR and an ITO ODR were fabricated.At a current of 20 mA,the optical output power of four samples was respectively 1.04,1.14,2.53 and 2.15 mW.The Au diffusion in the annealing process reduces the reflectivity of the Au/GaP reflector to 9%.The differe...     

Characteristics of AlGaN/GaN/AlGaN double heteroj unction HEMTs with an improved breakdown voltage

正We studied the performance of AlGaN/GaN double heterojunction high electron mobility transistors (DH-HEMTs) with an AlGaN buffer layer,which leads to a higher potential barrier at the backside of the twodimensional electron gas channel and better carrier confinement.This,remarkably,reduces the drain leakage current and improves the device breakdown voltage.The breakdown voltage of AlGaN/GaN double heterojunction HEMTs (~ 100 V) was significantly improved compared to that of conventional AlGaN/GaN HEMTs(~50 V) for the device with gate dimensions of 0.5 x 100μm and a gate-drain distance of 1μm.The DH-HEMTs also demonstrated a maximum output power of 7.78 W/mm,a maximum power-added efficiency of 62.3%and a linear gain of 23 dB at the drain supply voltage of 35 V at 4 GHz.     

Electrical Properties of Ultra Thin Nitride/Oxynitride Stack Dielectrics pMOS Capacitor with Refractory Metal Gate

Electrical properties of high quality ultra thin nitride/oxynitride（N/O）stack dielectrics pMOS capacitor with refractory metal gate electrode are investigated，and ultra thin (＜2 nm＝ N/O stack gate dielectrics with significant low leakage current and high resistance to boron penetration are fabricated.Experiment results show that the stack gate dielectric of nitride/oxynitride combined with improved sputtered tungsten/titanium nitride (W/TiN) gate electrode is one of the candidates for deep sub-micron metal gate CMOS devices.     

Source-field-plated Ga2O3 MOSFET with a breakdown voltage of 550 V

Ga_2O_3 metal–oxide–semiconductor field-effect transistors(MOSFETs) with high-breakdown characteristics were fabricated on a homoepitaxial n-typed β-Ga_2O_3 film, which was grown by metal organic chemical vapor deposition(MOCVD) on an Fedoped semi-insulating(010) Ga_2O_3 substrate. The structure consisted of a 400 nm unintentionally doped(UID) Ga_2O_3 buffer layer and an 80 nm Si-doped channel layer. A high k HfO_2 gate dielectric film formed by atomic layer deposition was employed to reduce the gate leakage. Moreover, a source-connected field plate was introduced to enhance the breakdown characteristics. The drain saturation current density of the fabricated device reached 101 mA/mm at V_gs of 3 V. The off-state current was as low as 7.1 ×10^-11 A/mm, and the drain current I_ON/I_OFF ratio reached 10~9. The transistors exhibited three-terminal off-state breakdown voltages of 450 and 550 V, corresponding to gate-to-drain spacing of 4 and 8 μm, respectively.     

Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

This paper investigates the feasibility of using a lanthanum oxide thin film (La_2O_3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La_2O_3 thickness. The thin La_2O_3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively.La_2O_3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 ℃ because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La_2O_3 thin film was thermally stable.The DC and RF characteristics of Pt/La_2O_3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined.The measurements indicated that the transistor with the Pt/La_2O_3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La_2O_3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.     

The effect of RF-driven gate current on DC/RF performance in GaAs pHEMT MMIC power amplifiers

This paper describes RF-driven gate current effects on the dc/RF performance of 0.15-/spl mu/m (gate length) 2-mil (substrate thickness) GaAs pseudomorphic high-electron mobility transistor (pHEMT) monolithic microwave integrated circuit power amplifiers (PAs). High gate current is generated in PAs under RF drive at room temperature. A long-term lifetest of PAs with various gate currents induced by RF drive was performed to investigate the effect of RF-driven gate current on dc/RF performance in GaAs pHEMT PAs. Accordingly, an empirical model was developed to predict the dc/RF performance of V-band PA modules by the end of life (EOL). This information is crucial for system engineers in order to budget sufficient output power so that the system can still maintain performance capability by EOL.     

Novel GaAs enhancement-mode/depletion-mode pHEMTs technology using high-k praseodymium oxide interlayer

In this study, a novel metal–semiconductor gate enhancement-mode (E-mode) and a metal–insulator-metal–semiconductor (MIMS) gate depletion-mode (D-mode) AlGaAs/InGaAs pseudomorphic high electron mobility transistor (pHEMT) on a single GaAs substrate have been developed by using high dielectric constant praseodymium insulator layer. The epitaxial layers were design for an enhancement-mode pHEMT after gate recess process. To achieve E/D-mode pHEMTs on single GaAs wafer, traditional Pt/Ti/Au metals were deposited as Schottky contact for E-mode pHEMTs and Pr/Pr₂O₃/Ti/Au were deposited as MIMS-gate for D-mode pHEMTs. This AlGaAs/InGaAs E-mode pHEMTs exhibit a gate turn-on voltage (V_ON) of +1 V and a gate-to-drain breakdown voltage of ?5.6 V, and these values were +7 V and ?34 V for MIMS-gate D-mode pHEMTs, respectively. Therefore, this high-k insulator in D-mode pHEMT is beneficial for suppressing the gate leakage current. Comparing to previous E/D-mode pHEMT technology, this E-mode pHEMTs and MIMS-gate D-mode pHEMTs exhibit a highly potential for high uniformity GaAs logic circuit applications due to its single recess process.     

高温及关态应力条件下GaAs pHEMT器件的性能退化研究

研究了高温和电学应力下砷化镓赝晶高电子迁移率晶体管的直流特性退化机理。高温下陷阱辅助发射电流引起器件关态漏电上升,而载流子迁移率的退化引起跨导降低;当温度达到450 K时,栅金属的沉降效应会导致跨导异常升高。进一步研究了不同温度下关态电学应力对器件性能退化的影响,结果与高温下栅沉降效应相吻合。     

GaAs field effect transistors fabricated by imprint lithography

A GaAs metal–semiconductor field-effect transistor (MESFET) has been realized based on mix-and-match fabrication using optical lithography for the ohmic contacts and imprint lithography for the gate. The gate length and width are 1.2 and 80 μm, respectively, the channel length is 4 μm. For the gate definition a Si-mold is embossed into a thin polymer film located on top of an n-doped GaAs layer. The gate is fabricated by metal evaporation and lift-off.     

10 Gbit/s GaAs 跨阻前置放大器

GaAs基pHEMT工艺适合于制作10Gbit／s速率的高速前置放大器电路。完成了工作于10Gbit／s速率的跨阻前置放大器电路的器件设计、电路设计,电路采用了串联电感L技术,有效地提高了工作带宽。模拟工作带宽达到9．0GHz,跨阻增益达到58dBt2。电路采用0．2pmGaAs基pHEMT电子束直写T型栅工艺制作。对制作的电路进行了电测试,可工作于10Gbit／s的速率。     

Flip-Chip Assembled GaAs pHEMT Ka-Band Oscillator

In this letter, we present a Ka-band oscillator with flip-chip assembled 0.15-mum-gate pHEMT. With a characterized 0.15-mum-gate GaAs pHEMT and consideration of the Au-Sn pillar bump transition, the GaAs pHEMT was flip-chip assembled on Al₂O₃ substrate where the passive components and coplanar waveguide connection were designed and fabricated. The measured output signal was at 27.55 GHz with an output power of 1.87 dBm and a phase noise of -109 dBc/Hz at 1-MHz offset, respectively. To our knowledge, this is the first flip-chip assembled pHEMT oscillator in the Ka-band     

多晶硅薄膜晶体管的表面氮钝化技术

采用N2O和NH3等离子钝化技术对多晶硅薄膜表面和栅氧表面进行了钝化处理。实验结果表明,该技术能有效降低多晶硅薄膜的界面态密度,提高多晶硅薄膜晶体管性能,二次离子质谱分析表明在p-Si/SiO界面有氮原子富积,说明生成了强的Si-N键。     

Simulation on the effect of non-uniform strain from the passivation layer on AlGaN/GaN HEMT

High electron mobility transistors (HEMTs) based on the III-nitride material system have attracted interest for high-frequency electronic components operating at high-power levels. Nitride based HEMTs can achieve power, bandwidth and efficiency levels that exceed the performance of Si, GaAs or SiC based devices. At present, a major limitation of nitride HEMTs is their failure to achieve reliability on par with Si-LDMOS or GaAs pHEMT devices. The development of SiN_x passivation layers have largely mitigated the gate lag effect, however, this passivation layer introduces an additional strain that forms a non-uniform polarization induced charge. Furthermore, this excess strain can locally relax the film eliminating the piezoelectric induced charge in addition to forming defects that act as electron traps.     

TaN wet etch for application in dual-metal-gate integration technology

Wet-etch etchants and the TaN film method for dual-metal-gate integration are investigated. Both HF/HN O_3/H_2O and NH_4OH/H_2O_2 solutions can etch TaN effectively, but poor selectivity to the gate dielectric for the HF/HNO_3/H_2O solution due to HF being included in HF/HNO_3/H_2O, and the fact that TaN is difficult to etch in the NH_4OH/H_2O_2 solution at the first stage due to the thin TaO_xN_y layer on the TaN surface, mean that they are difficult to individually apply to dual-metal-gate integration. A two-step wet etching strategy using the HF/HNO_3/H_2O solution first and the NH_4OH/H_2O_2 solution later can fully remove thin TaN film with a photo-resist mask and has high selectivity to the HfSiON dielectric film underneath. High-k dielectric film surfaces are smooth after wet etching of the TaN metal gate and MOSCAPs show well-behaved C-V and J_g-V_g characteristics, which all prove that the wet etching of TaN has little impact on electrical performance and can be applied to dual-metal-gate integration technology for removing the first TaN metal gate in the PMOS region.