一种增益与频率成正比的双频段正交压控振荡器

This paper presents a novel dual-band quadrature voltage controlled oscillator(VCO) with the gain proportional to the oscillation frequency.Frequency synthesizers with this VCO can reduce the bandwidth fluctuation over all the frequency ranges without compensation or calibration.Besides the original switched capacitor array, an extra switched varactor array is adopted for the implementation of the proposed VCO.The tuning technique of changing the values of the capacitor and varactor at the same ratio is also derived.For verification purposes, a 2.5 G/3.5 G dual-band quadrature VCO is fabricated in a 0.13μm CMOS process for WiMAX applications. Measurement results show that the VCO gain is closely proportional to the oscillation frequency with±16%variation over the entire frequency range.The phase noise is -138.15 dBc/Hz at 10 MHz from the 2.5 GHz carrier and -137.44 dBc/Hz at 10 MHz from the 3.5 GHz carrier.     

A low-phase-noise LC-VCO with an enhanced-Q varactor for use in a high-sensitivity GNSS receiver

An LC-VCO with an enhanced quality factor(Q) varactor for use in a high-sensitivity GNSS receiver is presented.An enhanced A-MOS varactor is composed of two accumulation-mode MOS(A-MOS) varactors and two bias voltages,which show the improved Q and linearization capacitance-voltage(C-V) curve.The VCO gain(K_(vco)) is compensated by a digital switched varactors array(DSVA) over entire sub-bands.Based on the characteristics of an A-MOS,the varactor in a DSVA is a high Q fixed capacitor as it is switched off,and a moderate Q tuning varactor when it is switched on,which keeps the maximal Q for the LC-tank.The proposed circuit is fabricated in a 0.18μm 1P6M CMOS process.The measured phase noise is better than -122 dBc/Hz at a 1 MHz offset while the measured tuning range is 58.2%and the variation of K_(VCO) is close to±21%over the whole of the sub-bands and the effective range of the control voltage.The proposed VCO dissipates less than 5.4 mW over the whole operating range from a 1.8 V supply.     

A 1.8-2.6 GHz CMOS VCO with switched capacitor array and switched inductor array

The design of a 1.76-2.56 GHz CMOS voltage-controlled oscillator(VCO) with switched capacitor array and switched inductor array is presented.Fabricated in 0.18μm 1P6M CMOS technology,the VCO achieves a 37% frequency tuning range.The measured phase noise varies between -118.5 dBc/Hz and -122.8 dBc/Hz at 1 MHz offset across the tuning range.Power consumption is about 14.4 mW with a 1.8 V supply.Based on a reconfigurable LC tank with switched capacitor array and switched inductor array,the tuning range is a...     

应用于K波段使用了一种新的可变电感的20~25.5G的压控振荡器

A novel transformer-type variable inductor is proposed to achieve a wide tuning range at frequencies as high as K band. The variable inductor is designed, and an intuitive model is built to analyze its performance by HFSS. A lot of mathematical analysis is done in detail. A VCO using the proposed variable inductor is designed with TSMC 0.13 μm CMOS technology for verification. The frequency tuning range of the VCO depends on the proposed variable inductor. The phase noise of the VCO depends on the quality of the LC tank （including the proposed variable inductor and varactors）. So a specific AMOS varactor is implemented to improve its quality factor. The VCO is simulated at three typical TSMC fabrication comers （TT, FF, SS） to predict its measure results. The post simulation results shows that the VCO achieves a 20-25.5 GHz continuous tuning range. Its phase noise results at 1 MHz offset are -108.4 dBc/Hz and -100.5 dBc/Hz respectively at the tuning frequencies of 19.6 GHz and 25.5 GHz. The VCO draws only 3 to 6 mA from a 1.2 V power supply.     

基于90nmCMOS工艺的低功耗宽带压控振荡器设计

A low power VCO with a wide tuning range and low phase noise has been designed and realized in a standard 90 nm CMOS technology. A newly proposed current-reuse cross-connected pair is utilized as a negative conductance generator to compensate the energy loss of the resonator. The supply current is reduced by half compared to that of the conventional LC-VCO. An improved inversion-mode MOSFET(IMOS) varactor is introduced to extend the capacitance tuning range from 32.8% to 66%. A detailed analysis of the proposed varactor is provided. The VCO achieves a tuning range of 27–32.5 GHz, exhibiting a frequency tuning range(FTR) of 18.4%and a phase noise of –101.38 d Bc/Hz at 1 MHz offset from a 30 GHz carrier, and shows an excellent FOM of –185d Bc/Hz. With the voltage supply of 1.5 V, the core circuit of VCO draws only 2.1 m A DC current.     

A 4.2-5 GHz,low phase noise LC-VCO with constant bandwidth and small tuning gain

As the tuning frequency of an integrated LC-voltage controlled oscillator （LC-VCO） increases, it is difficult to co-design the active negative resistance core and the varactor to achieve wideband frequency range, low phase noise, constant bandwidth and small tuning gain together. The presented VCO solves the problem by designing a set of changeable varactor units. The whole VCO was implemented in a 0.18μm CMOS process. The measured result shows -120 dBc/Hz phase noise at 1 MHz offset. The measured tuning range is from 4.2 to 5 GHz and the tuning gain is 8-10 MHz/V. The VCO draws 4 mA from a 1.5 V supply voltage.     

一种三阶环形压控振荡器的分析设计

This paper describes a large tuning range low phase noise voltage-controlled ring oscillator(ring VCO)based on a different cascade voltage logic delay cell with current-source load to change the current of output node.The method for optimization is presented.Furthermore,the analysis of performance of the proposed ring VCO is confirmed by the measurement results.The three-stage proposed ring VCO was fabricated in the 180-nm CMOS process of SMIC.The measurement results show that the oscillator frequency of the ring VCO is from 0.770 to5.286 GHz and the phase noise is 97.93 dBc/Hz at an offset of 1 MHz from 5.268 GHz with a total power of15.1 mW from a 1.8 V supply while occupying only 0.00175 mm2of the core die area.     

采用PMOS底部电流源的低功耗电流自调整压控振荡器

This paper presents the design and implementation of a current self-adjusted VCO with low power consumption. In the proposed VCO, a bottom PMOS current source instead of a top one is adopted to decrease the tail noise. A current self-adjusted technique without additional external control signals is taken to ensure the VCO starts up in the whole band while keeping the power consumption relatively low. Meanwhile, the phase noise of the VCO at the low frequency （high Cvar） can be reduced by the technique. The circuit is implemented in 0.18 μm CMOS technology. The proposed VCO exhibits low power consumption of 〈1.6 mW at a 1.5 V supply voltage and a tuning range from 11.79 to 12.53 GHz. The measured phase noise at 1 MHz offset from the frequency 11.79 GHz is-104.7 dBc/Hz, and the corresponding FOM is -184.2 dBc/Hz.     

A wideband 0.13 μm CMOS LC-VCO for IMT-advanced and UWB applications

This paper presents an LC voltage controlled oscillator(VCO) in a dual-band frequency synthesizer for IMT-advanced and UWB applications.The switched current source,cross-coupled pair and noise filtering technique are adopted in this VCO design to improve the performance of the phase noise,power consumption,voltage amplitude,and tuning range.In order to achieve a wide tuning range,a reconfigurable LC tank with 4 bits switch control is adopted in the core circuit design.The size of the entire chip with pad is 1.11 0.98 mm2.The test results show that the current dissipation of the VCO at UWB and IMT-Advanced band is 3 mA and 4.5 mA in a 1.2 V supply.The tuning range of the designed VCO is 3.86-5.28 GHz and 3.14-3.88 GHz.The phase-noise at 1 MHz frequency offset from a 3.5 GHz and 4.2 GHz carrier is-123 dBc/Hz and-119 dBc/Hz,respectively.     

LC voltage controlled oscillator in 0.18-μm RF CMOS

An integrated low-phase-noise voltage-controlled oscillator(VCO) has been designed and fabricated in SMIC 0.18μm RF CMOS technology.The circuit employs an optimally designed LC resonator and a differential cross-coupling amplifier acts as a negative resistor to compensate the energy loss of the resonator.To extend the frequency tuning range,a three-bit binary-weighted switched capacitor array is used in the circuit.The testing result indicates that the VCO achieves a tuning range of 60%from 1.92 to 3.35 GHz.The phase noise of the VCO is -117.8 dBc/Hz at 1 MHz offset from the carrier frequency of 2.4 GHz.It draws 5.6 mA current from a 1.8 V supply.The VCO integrated circuit occupies a die area of 600×900μm~2.It can be used in the IEEE802.11 b based wireless local network receiver.     

Ga2O3缓冲层厚度对柔性衬底沉积Cu/ITO薄膜性能的影响

Cu and Cu/ITO films were prepared on polyethylene terephthalate （PET） substrates with a Ga2O3 buffer layer using radio frequency （RF） and direct current （DC） magnetron sputtering. The effect of Cu layer thickness on the optical and electrical properties of the Cu film deposited on a PET substrate with a Ga2O3 buffer layer was studied, and an appropriate Cu layer thickness of 4.2 nm was obtained. Changes in the optoelectrical properties of Cu（4.2 nm）/ITO（30 nm） films were investigated with respect to the Ga2O3 buffer layer thickness. The optical and electrical properties of the Cu/ITO films were significantly influenced by the thickness of the Ga2O3 buffer layer. A maximum transmission of 86%, sheet resistance of 45 Ω/□ and figure of merit of 3.96 × 10^-3 Ω^ -1 were achieved for Cu（4.2 nm）/ITO（30 nm） films with a Ga2O3 layer thickness of 15 nm.     

一种应用于GNSS接收机的低噪声和低杂散频率综合器

A low phase noise and low spur phase locked loop （PLL） frequency synthesizer for use in global navigation satellite system （GNSS） receivers is proposed. To get a low spur, the symmetrical structure of the phase frequency detector （PFD） produces four control signals, which can reach the charge pump （CP） simultaneously, and an improved CP is realized to minimize the charge sharing and the charge injection and make the current matched. Additionally, the delay is controllable owing to the programmable PFD, so the dead zone of the CP can be eliminated. The output frequency of the VCO can be adjusted continuously and precisely by using a programmable LC-TANK. The phase noise of the VCO is lowered by using appropriate MOS sizes. The proposed PLL frequency synthesizer is fabricated in a 0.18 μm mixed-signal CMOS process. The measured phase noise at 1 MHz offset from the center frequency is -127.65 dBc/Hz and the reference spur is -73.58 dBc.     

超薄SiO2/HfO2双层栅介质的时变击穿特性和击穿机制的研究

The characteristics of TDDB （time-dependent dielectric breakdown） and SILC （stress-induced leakage current） for an ultra-thin SiO2/HfO2 gate dielectric stack are studied. The EOT （equivalent-oxide-thickness） of the gate stack （Si/SiO2/HfOz/TiN/TiA1/TiN/W） is 0.91 am. The field acceleration factor extracted in TDDB experi- ments is 1.59 s.cm/MV, and the maximum voltage is 1.06 V when the devices operate at 125 ℃ for ten years. A detailed study on the defect generation mechanism induced by SILC is presented to deeply understand the break- down behavior. The trap energy levels can be calculated by the SILC peaks： one S1LC peak is most likely to be caused by the neutral oxygen vacancy in the HfO2 bulk layer at 0.51 eV below the Si conduction band minimum; another SILC peak is induced by the interface traps, which are aligned with the silicon conduction band edge. Fur- thermore, the great difference between the two SILC peaks demonstrates that the degeneration of the high-k layer dominates the breakdown behavior of the extremely thin gate dielectric.     

Synthesis of In2S3 thin films by spray pyrolysis from precursors with different [S]/[In] ratios

Indium sulfide （InzS3） thin films were prepared by chemical spray pyrolysis technique from solutions with different [S]/[In] ratios on glass substrates at a constant temperature of 250 ~C. Thin films were characterized by X-ray diffraction （XRD）, scanning electron microscopy （SEM）, atomic force microscopy （AFM）, energy disper- sive X-ray spectroscopy （EDS）, Raman spectroscopy and optical transmittance spectroscopy. All samples exhibit a polycrystalline structure with a preferential orientation along （0, 0, 12）. A good stoichiometry was attained for all samples. The morphology of thin film surfaces, as seen by SEM, was dense and no cracks or pinholes were ob- served. Raman spectroscopy analysis shows active modes belonging to j3-1naS3 phase. The optical transmittance in the visible range is higher than 60% and the band gap energy slightly increases with the sulfur to indium ratio, attaining a value of 2.63 eV for [S]/[In] ： 4.5.     

TiO2 薄膜CMP表面粗糙度的研究

Abstract： Surface roughness by peaks and depressions on the surface of titanium dioxide （TiO2） thin film, which was widely used for an antireflection coating of optical systems, caused the extinction coefficient increase and affected the properties of optical system. Chemical mechanical polishing （CMP） is a very important method for surface smoothing. In this polishing experiment, we used self-formulated weakly alkaline slurry. Other process parameters were working pressure, slurry flow rate, head speed, and platen speed. In order to get the best surface roughness （1.16 A, the scanned area was 10 × 10 μm2） and a higher polishing rate （60.8 nm/min）, the optimal parameters were： pressure, 1 psi; slurry flow rate, 250 mL/min; polishing head speed, 80 rpm; platen speed, 87 rpm.     

高效太阳电池硅衬底特性对原子层沉积Al2O3薄膜钝化性能的影响

Atom layer deposition （ALD）-Al2O3 thin films are considered effective passivation layers for p-type silicon surfaces. A lower surface recombination rate was obtained through optimizing the deposition parameters. The effects of some of the basic substrate characteristics including material type, bulk resistivity and surface morphology on the passivation performance of ALD-Al2O3 are evaluated in this paper. Surface recombination velocities of 7.8 cm/s and 6.5 cm/s were obtained for p-type and n-type wafers without emitters, respectively. Substrates with bulk resistivity ranging from 1.5 to 4 Ω · cm were all great for such passivation films, and a higher implied Voc of 660 mV on the 3 Ω · cm substrate was achieved. A minority carrier lifetime （MCL） of nearly 10 μs higher was obtained for cells with a polished back surface compared to those with a textured surface, which indicates the necessity of the polishing process for high-efficiency solar cells. For n-type semi-finished solar cells, a lower effective front surface recombination velocity of 31.8 cm/s was acquired, implying the great potential of （ALD）-Al2O3 thin films for high-efficiency n-type solar cells.     

一款采用跨导增强技术的新型宽带低噪声放大器

A new broadband low-noise amplifier （LNA） is proposed. The conventional common gate （CG） LNA exhibits a relatively high noise figure, so active gin-boosting technology is utilized to restrain the noise generated by the input transistors and reduce the noise figure. Theory, simulation and measurement are shown. An implemented prototype using 0.13 μm CMOS technology is evaluated using on-wafer probing. S11 and S22 are below -10 dB across 0.1-5 GHz. Measurements also show a gain of 18.3 dB with a 3 dB bandwidth from 100 MHz to 2.1 GHz and an ⅡP3 of-7 dBm at 2 GHz. The measured noise figure is better than 2.5 dB below 2.1 GHz, is better than 4.5 dB below 5 GHz, and at 500 MHz, it gets its minimum value 1.8 dB. The LNA consumes 9 mA from 1.5 V supply and occupies an area of 0.04 mm^2.     

氧化铟纳米管的制备及它的甲苯气敏特性研究

Abstract： The pristine In2O3 nanotubes were synthesized by electrospinning and subsequent calcination. Scanning electron microscope, X-ray powder diffraction and transmission electron micrograph were employed to analyze the morphology and crystal structure of the as-synthesized nanotubes. Gas-sensing properties of the as-synthesized In203 nanotubes were investigated by exposing the corresponding sensors to toluene, acetone, ethanol, formalde- hyde, ammonia and carbon monoxide at 340 ℃. The results show that the gas sensor possesses a good selectivity to toluene at 340 ℃. The response of the In2O3 nanotube gas sensor to 40 ppm is about 5.88. The response and recovery times are about 3 s and 17 s, respectively.     

The total dose effects on the 1/f noise of deep submicron CMOS transistors

Using 0.18 μm CMOS transistors, the total dose effects on the 1/f noise of deep-submicron CMOS transistors are studied for the first time in mainland China. From the experimental results and the theoretic analysis, we realize that total dose radiation causes a lot of trapped positive charges in STI （shallow trench isolation） SiO2 layers, which induces a current leakage passage, increasing the 1/f noise power of CMOS transistors. In addition, we design some radiation-hardness structures on the CMOS transistors and the experimental results show that, until the total dose achieves 750 krad, the 1/f noise power of the radiation-hardness CMOS transistors remains unchanged, which proves our conclusion.     

不同氧化退火工艺下SiO2/SiC界面特性研究

The effect of the different re-oxidation annealing （ROA） processes on the SiO2/SiC interface charac- teristics has been investigated. With different annealing processes, the flat band voltage, effective dielectric charge density and interface trap density are obtained from the capacitance-voltage curves. It is found that the lowest interface trap density is obtained by the wet-oxidation annealing process at 1050 ℃ for 30 min, while a large num- ber of effective dielectric charges are generated. The components at the SiO2/SiC interface are analyzed by X-ray photoelectron spectroscopy （XPS） testing. It is found that the effective dielectric charges are generated due to the existence of the C and H atoms in the wet-oxidation annealing process.