A Single-Ended Resistive $X$-Band AlGaN/GaN HEMT MMIC Mixer

A broadband highly linear X-band mixer in AlGaN/GaN monolithic microwave integrated circuit technology has been designed, processed, and characterized. The design is based on a 4 times 100 mum AlGaN/GaN HEMT in a single-ended circuit topology. The mixer has an IF bandwidth of 2 GHz with a conversion loss (CL) of < 8 dB across the X-band with a minimum CL of 6.9 dB at 11 GHz. The large-signal performance is exemplified by IIP 3 levels of 22 and 30 dBm at local oscillator drive levels of 15 and 23 dBm, respectively. A minimum noise figure of 9 dB is achieved at 11.6 GHz.     

0.5-V 5.6-GHz CMOS Receiver Subsystem

The building blocks of a 0.5-V receiver, including a receiver front-end and a low-pass filter (LPF), are fabricated using 0.18- $mu{hbox{m}}$ CMOS technology. At 5.6 GHz, the receiver front-end achieves a voltage gain of 17.1 dB and a noise figure of 8.7 dB, while dissipating at 19.4 mW. The fifth-order low-pass Chebyshev filter achieves a corner frequency of 2.6 MHz and an input-referred noise of 28.5 nV/sqrt (Hz) at 6.8 mW. The receiver front-end is further integrated with the LPFs to form a highly integrated receiver subsystem at ultra-low voltage.      

A 1.5-V multi-mode quad-band RF receiver for GSM/EDGE/CDMA2K in 90-nm digital CMOS process

A single chip quad-band multi-mode (GSM900/ DCS1800/PCS1900/CDMA2K) direct-conversion RF receiver with integrated baseband ADCs is presented. The fully integrated RF receiver is implemented in a 90-nm single poly, six level metal, standard digital CMOS process with no additional analog and RF components. The highly digital multi-mode receiver uses minimum analog filtering and AGC stages, digitizing useful signal, dynamic DC offsets and blockers at the mixer output. The direct-conversion GSM front-end utilizes resistive loaded LNAs with only two coupled inductors per LNA. The GSM front-end achieves a 31.5 dB gain and a 2.1 dB integrated noise figure with a 5 dB noise figure under blocking conditions. The CDMA2K front-end utilizes a self-biased common-gate input amplifier followed by passive mixers, achieving wideband input matching from 900 MHz up to 2.1 GHz with an IIP3 of +8 dBm. The GSM receiver consumes 38 mA from a power supply of 1.5 V and CDMA2K receiver consumes 16 mA in the low band and 21 mA in the high band. The multi-mode receiver, including LO buffers and frequency dividers, ADCs, and reference buffers, occupies 2.5 mm/sup 2/.     

Low-Frequency Noise Characteristics in Ion-Implanted GaN-Based HEMTs

Low-frequency noise characteristics in ion-implanted GaN/AlGaN/GaN and AlGaN/GaN HEMTs were investigated. The normalized spectral noise density was about 6 dB lower in GaN/AlGaN/GaN HEMTs than in AlGaN/GaN HEMTs. The normalized spectral noise density dependence on the gate length Lg indicates that the main origin of low-frequency noise is at the region under the gate in both devices. The Hooge parameters alphaH for both devices are on the order of 10^-1-10^{- 2}. The ion implantation process introduces a lot of defects in the source/drain regions, but the values of alphaH are comparable with those for conventional GaN-based HEMT devices. The values of alphaH are also lower in GaN/AlGaN/GaN HEMTs than in AlGaN/GaN HEMTs, which is due to the decrease of surface potential fluctuations in GaN/AlGaN/GaN HEMTs.     

A CMOS RF front-end for a multistandard WLAN receiver

This letter describes the design and performance of a dual band tri-mode receiver front-end compliant with the IEEE 802.11a, b, and g standards. The receiver front-end was built in a 0.18-/spl mu/m CMOS process and achieves a noise figure of 4.7 dB/5.1 dB for the 2.4-GHz/5-GHz bands, respectively. The receiver front-end provides a dual gain mode of 5 dB/30 dB with an IIP3 of -1dBm for the low gain mode. The front-end draws 25 mA/27 mA from a 1.8-V supply for the 2.4-GHz/5-GHz bands, respectively.     

3-D Integration of 10-GHz Filter and CMOS Receiver Front-End

A 10-GHz filter/receiver module is implemented in a novel 3-D integration technique suitable for RF and microwave circuits. The receiver designed and fabricated in a commercial 0.18-mum CMOS process is integrated with embedded passive components fabricated on a high-resistivity Si substrate using a recently developed self-aligned wafer-level integration technology. Integration with the filter is achieved through bonding a high-Q evanescent-mode cavity filter onto the silicon wafer using screen printable conductive epoxy. With adjustment of the input matching of the receiver integrated circuit by the embedded passives fabricated on the Si substrate, the return loss, conversion gain, and noise figure of the front-end receiver are improved. At RF frequency of 10.3 GHz and with an IF frequency of 50 MHz, the integrated front-end system achieves a conversion gain of 19 dB, and an overall noise figure of 10 dB. A fully integrated filter/receiver on an Si substrate that operates at microwave frequencies is demonstrated.     

Monolithically integrated enhancement/depletion-mode AlGaN/GaN HEMT D flip-flop using fluorine plasma treatment

Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer.Direct-coupled FET logic circuits,such as an E/D HEMT inverter,NAND gate and D flip-flop,were fabricated on an AlGaN/GaN heterostructure.The D flip-flop and NAND gate are demonstrated in a GaN system for the first time.The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area,integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate.E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure.At a supply voltage of 2 V,the E/D inverter shows an output logic swing of 1.7 V,a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V.The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.     

Ku波段20W AlGaN/GaN功率管内匹配技术研究

文章的主要目的是研究第三代半导体AlGaN/GaN功率管内匹配问题。以设计Ku波段20WGaN器件为例,研究了内匹配电路的设计、合成以及内匹配电路的测试,实现了GaN功率HEMT在Ku波段20W连续波输出功率的内匹配电路,并使整个电路的输入、输出电路阻抗提升至50Ω。最终所研制的AlGaN/GaNKu波段内匹配功率管在11.8GHz～12.2GHz频带内,输出功率大于20W。在12GHz功率增益大于5dB,功率附加效率29.07%,是目前国内关于GaN功率器件在Ku波段连续波输出的最高报道。     

A 0.13 /spl mu/m CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier

This paper presents a fully integrated CMOS receiver front-end based on a direct conversion architecture for UMTS/802.11b-g and a low-IF architecture at 100 kHz for DCS1800. The two key building blocks are a multiband low-noise amplifier (LNA) that uses positive feedback to improve its gain and a highly linear mixer. The front-end, integrated in a 0.13 /spl mu/m CMOS process, exhibits a minimum noise figure of 5.2 dB, a programmable gain that can be varied from 13.5 to 28.5 dB, an IIP3 of more than -7.5 dBm and an IIP2 better than 50 dBm. The total current consumption is 20mA from a 1.2V supply.     

A 2.4-GHz sub-mW CMOS receiver front-end for wireless sensors network

A 2.4-GHz fully integrated CMOS receiver front-end using current-reused folded-cascode circuit scheme is presented. A configuration utilizing vertically stacked low-noise amplifier (LNA) and a folded-cascode mixer is proposed to improve both conversion gain and noise figure suitable for sub-mW receiver circuits. The proposed front-end achieves a conversion gain of 31.5dB and a noise figure of 11.8dB at 10MHz with 500-/spl mu/A bias current from a 1.0-V power supply. The conversion gain and noise figure improvements of the proposed front-end over a conventional merged LNA and single-balanced mixer are 11dB and 7.2dB at 10MHz, respectively, with the same power consumption of 500/spl mu/W.     

A 2.4-GHz low-IF receiver for wideband WLAN in 6-μmCMOS-architecture and front-end

This paper presents the 2.4-GHz front-end and the first downconversion section of a fully integrated low-IF receiver. The dual-conversion receiver rejects the image repeatably by 60 dB using integrated polyphase filters without calibration or tuning. The gain of the RF mixer and IF amplifier is switchable to slide the available dynamic range of the following stages based on the conditions of the input signal. The front-end and downconversion sections drain 35 mA on average from a 3.3-V supply. Minimum cascade noise figure is 7.2 dB, and maximum cascade IIP3 is -3.4 dBm     

An RF front-end with an automatic gain control technique for a U/V band CMMB receiver

This paper presents a fully integrated RF front-end with an automatic gain control(AGC) scheme and a digitally controlled radio frequency varied gain amplifier(RFVGA) for a U/V band China Mobile Multimedia Broadcasting(CMMB) direct conversion receiver.The RFVGA provides a gain range of 50 dB with a 1.6 dB step. The adopted AGC strategy could improve immunity to adjacent channel signal,which is of importance for CMMB application.The front-end,composed of a low noise amplifier(LNA),an RFVGA,a mixer and AGC,achieves an input referred 3rd order intercept point(IIP3) of 4.9 dBm with the LNA in low gain mode and the RFVGA in medium gain mode,and a less than 4 dB double side band noise figure with both the LNA and the RFVGA in high gain mode.The proposed RF front-end is fabricated in a 0.35μm SiGe BiCMOS technology and consumes 25.6 mA from a 3.0 V power supply.     

Microwave noise characteristics of AlGaN/GaN HEMTs on SiC substrates for broad-band low-noise amplifiers

This letter reports high-performance passivated AlGaN/GaN high electron-mobility transistors (HEMTs) with 0.25-/spl mu/m gate-length for low noise applications. The devices exhibited a minimum noise figure (NF/sub min/) of 0.98 dB and an associated gain (G/sub a/) of 8.97 dB at 18 GHz. The noise resistance (R/sub n/), the measure of noise sensitivity to source mismatch, is 31/spl Omega/ at 18 GHz, which is relatively low and suitable for broad-band low noise amplifiers. The noise modeling analysis shows that the minimum noise figure of the GaN HEMT can be reduced further by reducing noise contributions from parasitics. These results demonstrate the viability of AlGaN/GaN HEMTs for low-noise as well as high power amplifiers.     

Characteristics of AlGaN/GaN/AlGaN double heteroj unction HEMTs with an improved breakdown voltage

正We studied the performance of AlGaN/GaN double heterojunction high electron mobility transistors (DH-HEMTs) with an AlGaN buffer layer,which leads to a higher potential barrier at the backside of the twodimensional electron gas channel and better carrier confinement.This,remarkably,reduces the drain leakage current and improves the device breakdown voltage.The breakdown voltage of AlGaN/GaN double heterojunction HEMTs (~ 100 V) was significantly improved compared to that of conventional AlGaN/GaN HEMTs(~50 V) for the device with gate dimensions of 0.5 x 100μm and a gate-drain distance of 1μm.The DH-HEMTs also demonstrated a maximum output power of 7.78 W/mm,a maximum power-added efficiency of 62.3%and a linear gain of 23 dB at the drain supply voltage of 35 V at 4 GHz.     

A 5.4 mW/0.07 mm$^{2}$ 2.4 GHz Front-End Receiver in 90 nm CMOS for IEEE 802.15.4 WPAN Standard

An integrated 2.4 GHz CMOS receiver front-end according to the IEEE 802.15.4 standard is presented in this paper. It integrates the overall RF part, from the balun up to the first stage of the channel filter, as well as the cells for the LO signal conditioning. The proposed architecture is based on a 6 MHz low-IF topology, which uses an inductorless LNA and a new clocking scheme for driving a passive mixer. When integrated in a 90 nm CMOS technology, the receiver front-end exhibits an area of only 0.07 mm², or 0.23 mm² when including an input integrated balun. The overall chip consumes 4 mA from a single 1.35 V supply voltage and it achieves a 35 dB conversion gain from input power in dBm to output voltage in dBvpk, a 7.5 dB NF value, -10 dBm of IIP3 and more than 32 dB of image rejection.     

A 3.1-4.8 GHz CMOS receiver for MB-OFDM UWB

An integrated fully differential ultra-wideband CMOS receiver for 3.1-4.8 GHz MB-OFDM systems is presented. A gain controllable low noise amplifier and a merged quadrature mixer are integrated as the RF front-end. Five order Gm-C type low pass filters and VGAs are also integrated for both I and Q IF paths in the receiver. The ESD protected chip is fabricated in a Jazz 0.18 μm RF CMOS process and achieves a maximum total voltage gain of 65 dB, an AGC range of 45 dB with about 6 dB/step, an averaged total noise figure of 6.4 to 8.8 dB over 3 bands and an in-band lIP3 of-5.1 dBm. The receiver occupies 2.3 mm2 and consumes 110 mA from a 1.8 V supply including test buffers and a digital module.     

Current Crowding in High Performance Low-Loss HFET RF Switches

We report on an integrated low-loss, high-isolation RF switch using large periphery AlGaN/GaN heterostructure field-effect transistors (HFETs) connected in a Gamma-cell configuration. The insertion loss was below 0.27 dB and isolation exceeded 28 dB in the frequency range from direct current to 2 GHz. The unit-width ON resistance of large periphery HFETs was slightly higher than that of narrower devices due to current crowding in the metal electrodes. Modeling of the observed current crowding effect predicts that an optimized design will yield less than a 0.1 dB insertion loss, which is comparable to the best RF MEMS.     

毫米波雷达四元微带双天线阵的研制

本文介绍了一种应用于收发分离体制毫米波雷达前端的小型微带阵列双天线.双天线包含两个四元并馈微带天线阵,共置于直径为18.6毫米的圆形衬底上,分别作为雷达前端的接收和发射天线.前端电路采用自行研制的毫米波雷达MMIC套片,利用MCM技术集成在与天线共型的圆形衬底上,与天线以背对背方式连接,采用小孔耦合技术进行场耦合.经过对天线和整个前端的测试,收发天线提供了10.5dB的增益,两天线问的隔离度优于-34dB,雷达前端具备良好的收发性能.     

功率合成电路在氮化镓放大器中的应用

针对氮化镓大功率放大器,由于传统1/4λ枝节线的电桥互耦造成放大器的直流自激和低频自激,在传统1/4λ传输枝节的Wilkinson电桥的基础上,结合氮化镓器件尺寸,设计出以3/4λ传输枝节的Wilkinson电桥为功率分配器/合成器。其输出端口尺寸为27.2mm。在8GHz～9GHz内,插入损耗<1dB,输出端口隔离度>14dB,端口回波损耗>9dB。利用实验室自制的SiC材料衬底的2.5mm栅宽GaN HEMT器件为放大单元,设计完成了两路合成放大器,在8GHz连续波条件下,放大器饱和输出功率为41.46dBm,合成效率为82.3%。通过分析发现,放大器合成效率的下降主要是由每路放大单元特性不一致和功率合成网络损耗所造成的。     

Monolithically integrated enhancement/depletion-mode AIGaN/GaN HEMT D flip-flop using fluorine plasma treatment

Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer. Direct-coupled FET logic circuits, such as an E/D HEMT inverter, NAND gate and D flip-flop, were fabricated on an AlGaN/GaN heterostructure. The D flip-flop and NAND gate are demonstrated in a GaN system for the first time. The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area, integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate. E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure. At a supply voltage of 2 V, the E/D inverter shows an output logic swing of 1.7 V, a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V. The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.